Method of simulating hot carrier deterioration of an MOS transis

Details Method of simulating hot carrier deterioration of an MOS transis Method of simulating hot carrier deterioration of an MOS transis

1994-06-17

1996-04-16

Wieder, Kenneth A.

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

324768, 324765, G01R 3126

Patent

active

055086322

ABSTRACT:
In a method of simulating hot carrier deterioration of an MOS transistor,

REFERENCES:
patent: 4942357 (1990-07-01), Chang
"Simulation of MOSFET Lifetime Under AC Hot-Electron Stress", by Mary M. Kuo et al, IEEE Trans. Electron Devices, vol. 35, pp. 1004-1011, Jul. 1988.
"A Simple Method to Characterize Substrate Current in MOSFET's", by T. Y. Chan et al, IEEE Electron Device Lett., vol. EDL-5, pp. 505-507, Dec. 1984.
"BSIM: Berkeley Short-Channel IGFET Model for MOS Transistors", by Bing J. Sheu et al, IEEE J. Solid-State Circuits, vol. SC-22, pp. 558-566, Aug. 1987.
"Hot-Carrier Current Modeling and Device Degradation in Surface-Channel p-MOSFET's", by Tong-Chern Ong et al, IEEE Trans. Electron Devices, vol. 37, pp. 1658-1666, Jul. 1990.
"Lucky-Electron Model of Channel Hot-Electron Injection in MOSFET's", by Simon Tam et al, IEEE Trans. Electron Devices, vol. ED-31, pp. 1116-1125, Sep. 1984.

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