Boots – shoes – and leggings
Patent
1986-02-24
1988-09-20
Shaw, Gareth D.
Boots, shoes, and leggings
G06F 900
Patent
active
047730382
ABSTRACT:
A method is described for simulating additional processors in a SIMD computer by dividing the memory associated with each processor into a plurality of sub-memories and then operating on each sub-memory in succession as if it were associated with a separate processor. Thus, a first instruction or set of instructions is applied to all the processors of the array to cause at least some processors to process data stored at a first location or locations in the first sub-memory. Thereafter, the same first instruction or set of instructions is applied to all the processors of the array to cause at least some processors to process data stored at the same first location in a second sub-memory. And so forth for each of the sub-memories. By operating a SIMD computer in this fashion, it is possible in effect to vary the number of processors in the array so as to provide the number of processors required for a problem.
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IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Management, Hot Springs, Va., Nov. 11th-13th, 1981, pp. 201-208, IEEE, New York, U.S.; S. L. Tanimoto et al.: "An Image Processor Based on an Array of Pipelines".
Hillis W. Daniel
Kahle Brewster
Lasser Clifford
Sims Karl
Mills, III John G.
Shaw Gareth D.
Thinking Machines Corporation
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