Method of semiconductor manufacturing for small features

Details Method of semiconductor manufacturing for small features Method of semiconductor manufacturing for small features

2009-06-29

2011-12-06

Richards, N Drew (Department: 2895)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S700000, C438S703000, C438S725000, C438S736000

Reexamination Certificate

active

08071485

ABSTRACT:
Small feature patterning is accomplished using a multilayer hard mask (HM). Embodiments include sequentially forming a first HM layer and a multilayer HM layer over a substrate, the multilayer HM layer comprising sublayers, etching the multilayer HM layer to form a first opening having an upper first opening with sides converging to a lower second opening and a second opening with substantially parallel sides and an opening substantially corresponding to the lower second opening of the first opening, etching through the second opening to form a corresponding opening in the first HM layer, and etching the substrate through the corresponding opening in the first HM layer.

REFERENCES:
patent: 6368979 (2002-04-01), Wang et al.
patent: 2004/0108569 (2004-06-01), Breen et al.
patent: 2005/0250290 (2005-11-01), Temmler
patent: 2009/0246713 (2009-10-01), Zin et al.
patent: 2011/0039416 (2011-02-01), Cole et al.
Abstract of: Smith, S.R., et al., Physical properties of PECVD amorphous carbon deposited at high temperature for use as an etch hard mask, Advanced Metallization Conference 2006 (AMC 2006). 2007, US.

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