Method of RFIC die-package configuration

Details Method of RFIC die-package configuration Method of RFIC die-package configuration

2007-09-04

2007-09-04

Smoot, Stephen W. (Department: 2813)

Semiconductor device manufacturing: process

With measuring or testing

Packaging or treatment of packaged semiconductor

C438S125000, C257SE21505

Reexamination Certificate

active

10944526

ABSTRACT:
A method for packaging a radio frequency integrated circuit (RFIC) in multiple packages begins by determining a 1stposition of the RFIC die in a 1stpackage wherein the positioning is such to minimize adverse affects of parasitic components of coupling between the radio frequency input/output section and an antenna. Once the position within the 1stpackage has been determined, the corresponding parasitics are measured to determine their values. The processing then continues by determining a 2ndposition of the RFIC die in a 2ndpackage based on the values of the parasitic components. Accordingly, the 2ndposition places the die within the 2ndpackage such that the parasitic components of coupling between the RF I/O section to the antenna within the 2ndpackage substantially matches the parasitic components of coupling the RFIO section to the antenna in the 1stpackage. Accordingly, different packages may be used with the same RFIC die, while maintaining the desired noise reduction.

REFERENCES:
patent: 6580163 (2003-06-01), Poulin
patent: 2001/0026953 (2001-10-01), Ito et al.
patent: 2001/0052645 (2001-12-01), Op'T Eynde et al.

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