Method of restoring the orientation of a pinned layer of a...

Dynamic magnetic information storage or retrieval – General recording or reproducing – Specifics of biasing or erasing

Reexamination Certificate

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C300S013000, C324S252000

Reexamination Certificate

active

06366420

ABSTRACT:

FIELD OF THE INVENTION
The invention relates generally to the field of information storage, more specifically to hard disk drives and in particular to preamplifier circuits.
BACKGROUND OF THE INVENTION
U.S. Pat. No. 5,831,888 entitled “Automatic Gain Control Circuit” and assigned to Texas Instruments Incorporated, the assignee of the present invention, sets forth generally the description of disk storage. Hard disk drives (HDD) are one type of disk storage that are particularly used in personal computers today. The HDD device generally includes a magnetic storage media, such as rotating disks or platters, a spindle motor, read/write heads, an actuator, a preamplifier, a read channel, a write channel, a servocontroller, a memory and control circuitry to control the operation of the HDD and to properly interface the HDD to a host or system bus. The following U.S. Patents describe various aspects of HDD devices:
5,535,067
Frequency Controlled Reference
Issued
07/09/96
Generator
5,570,241
Single Channel, Multiple Head
10/29/96
Servo. . .
5,862,005
Synchronous Detection Of Wide
01/19/99
BI-Phase. . .
5,793,559
In Drive Correction Of Servo Pattern. . .
08/11/98
5,719,719
Magnetic Disk Drive With Sensing. . .
02/17/98
5,444,583
Disk Drive Having On-Board
08/22/95
Triggered. . .
5,448,433
Disk Drive Information Storage
09/05/95
Device. . .
5,208,556
Phase Lock Loop For Sector Servo
05/04/93
System
5,642,244
Method and Apparatus For
06/24/97
Switching. . .
Prior art
FIG. 1
illustrates a disk/head assembly
12
and a preamplifier
14
. The preamplifier
14
handles both read functions and write functions. Not illustrated in
FIG. 1
, for clarity, is the Magentoresistive (MR) head. The unshown MR head works through magnetic media and it has both functions, read and write, with a different portion of the head performing each function. The write function portion of the MR head is inductive and the read function portion of the head acts as a magnetic resistive element. A write occurs through an inductive element to the magnetic media disk assembly
12
and a read occurs by sensing the magnetic shifts in the disk assembly
12
by using the resistive read element. The preamplifier
14
connects to the unshown MR head.
Prior art magnetoresistive heads are described in the Background of Invention of U.S. Pat. No. 5,287,238 issued on Feb. 15, 1994 to Baumgart, et al of IBM. Baumgart presented a new type of MR head known as the giant magnetoresistance, GMR, head. The GMR head consists of a multilayered structure that has the magnetization directions of its outer layers of ferromagnetic material fixed, or pinned, while the magnetization direction of intermediate layer is free to rotate. GMR heads are further discussed in the following U.S. Patents:
5,883,764
Magnetoresistive Sensor Having. . .
Issued
03/16/99
5,856,897
Self-Biased Dual Spin Valve Sensor
01/05/99
5,880,913
Antiparallel Pinned Spin Valve. . .
03/09/99
5,867,351
Spin valve Read Head With Low. . .
02/02/99
5,859,754
Mangetoresistive Transducer Having. . .
01/12/99
Prior art
FIG. 2
illustrates a portion of the read channel of preamplifier
14
of FIG.
1
. The resistive portion of the unshown GMR head is represented by the resistor Rmr. Only one resistor is illustrated in the drawing. In typical mass storage devices of the HDD type, the preamplifier
14
may have as many as 1 to 8 channels. An initial amplification stage
18
of preamplifier
14
connects to the resistive portion Rmr of the GMR head. Later gain stages
20
of preamplifier
14
are connected to the outputs of initial amplification stage
18
at nodes M and N. The read path outputs flow from the later gain stages
20
. The read channel selection inputs flow into preamplifier
14
from an unillustrated head select logic stage. Transistor M
2
represents the read channel input enabling MOS transistor for head
0
.
The architecture of initial amplification stage
18
of preamplifier
14
is constructed as that of a single ended amplifier as opposed to a differential amplifier; the single ended amplifier uses only one NPN bipolar transistor Q
1
to set the voltage on the load side of later gain stage
20
. (As is known to one of ordinary skill in the art of amplifier design, a differential amplifier uses two transistors to establish the voltages on the node M and N inputs to the differential amplifier
20
.) On the RL load side of the single ended amplifier, the bias current Ib travels through the load resistor RL and through the collector of transistor Q
1
to set the voltage on node M. On the constant voltage side of the single ended amplifier, the bias current Ib/∝ travels through the scaling reference resistor Ref to set the voltage on node N. In hard disk drives, because of linearity problems during a read operation, the voltage on the read head (represented by VRmr) is biased up to a certain level, which is typically around 0.2 to 0.5 volts. This bias voltage VRmr is established through a feedback loop created by transconductance amplifier
22
across nodes M and N whose output is connected to the base of transistor Q
0
through MOS switch M
2
. This, in essence, creates a pseudo-balanced output on the reader load resistors such as would exist if a differential amplifier were used in the initial amplification stage
18
.
In operation of prior art
FIG. 2
, when head
0
is selected by unillustrated head select logic circuitry (which establishes a current Imr on the gate of MOS transistor M
2
) NPN bipolar transistors Q
0
and Q
1
are on. Together with the load resistor RL, they form a cascode amplifier. A cascode amplifier is a high bandwidth amplifier. The transistor Q
0
is a common base amplifier and the transistor Q
1
acts as a common base amplifier. As the magnetic resistive head moves over data, the head resistance Rmr varies. This can be modeled by an alternating current ac signal in series with the Rmr resistor. The transistors Q
0
and Q
1
amplify this signal. The ac signal goes to the load resistor RL and to the node M input of latter gain stage
20
that is a differential amplifier. The other input of the amplifier
20
is node N that should be at a dc bias voltage equal to the voltage on the load resistor L
1
node M. The node N constant voltage side of the later gain stage amplifier
20
should not have an alternating current signal on it. This is achieved by having a reference side of single ended initial amplification stage
18
that consist of transistor Q
2
and the scaling resistor Ref. This supplies a current Ib/∝ through the scaling resistor Ref, which provides a voltage at node N. The transconductance amplifier
22
forms a feedback loop with the cascode amplifier Q
0
and Q
1
. The purpose of the loop is to make sure that node M dc voltage on the signal side of the load resistor RL is the same as the dc voltage on node N. If the dc voltage on node M and node N are the same, the input voltages on differential amplifier
20
are the same. On node N, there is no ac signal; on node M there is an ac signal. If the dc voltages are equal, then the differential later gain stage amplifier
20
will amplify the ac signal and send it to further gain stages.
GMR heads offer the ability to increase the drive capacity of the read channel of the preamplifier significantly. However, the increased drive capability comes with a drawback as the magnetization orientation of the pinned layer can be damaged as the temperature of the GMR head rises. (Because more current flows through the read channel due to increased drive performance, the preamplifier circuitry heats up which in turn heats up the GMR head.) Incorrect magnetic orientation in the pinned layer gives rise to data read errors.
It is thus an object of the invention to provide a mechanism by which the magnetic orientation in the pinned layer of GMR heads can be restored to the correct orientation. Such restoration will reduce data read errors.
Other objects and advantages of the invention herein will be apparent to those of ordinary skill in the art having the benefit of the description her

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