Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2002-11-29
2004-10-19
Deb, Anjan K. (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S711000, C324S765010
Reexamination Certificate
active
06806720
ABSTRACT:
BACKGROUND OF INVENTION
Reliability testing is carried out to ensure that products are properly designed and assembled by subjecting test structures to stress conditions that accelerate potential failure mechanisms. Failure may be caused by the degradation of a dielectric layer on a semiconducting or conducting substrate in, for example, Metal Oxide (MOS) integrated circuits (ICs). The aggressive scaling of the thickness of the dielectric layer has caused the reliability of increasingly thinner dielectrics to assume greater importance in the reliability testing of semiconductor ICs.
The degradation of the dielectric layer over time causes it to lose its insulating properties, leading to increases in leakage current that may limit the lifetime of the device. Long-term failure rates are often predicted based on determining the critical breakdown time of the dielectric layer. Referring to
FIG. 1
, a reliability test is carried out by subjecting a dielectric layer to highly accelerated stress conditions, such as high temperatures or voltages. The leakage current is continuously measured until the first current increase after, for example, time t
0
. This current increase may be relatively small as shown in
FIG. 1
or could be a large increase that reaches compliance of the power supply. In the first case, which is mostly found in dielectrics thinner than 5.5 nm, the dielectric layer may experience subsequent breakdowns after t
0
, which leads to further increases in current. The criterion for determining the critical breakdown time is the first onset of a current increase at time t
0
.
However, the critical breakdown time of the dielectric layer thus defined does not necessarily cause the circuit or device to be inoperable or lose its functionality. For example, it has been observed that a ring oscillator circuit continues to operate even after a number of its transistors have undergone a hard gate-oxide breakdown in B. Kaczer et al, “Impact of MOSFET oxide breakdown on digital circuit operation and reliability”, IEDM Tech. Digest, pp.553-556 (2000), which is herein incorporated by reference for all purposes.
The magnitude of the current (e.g. I
m
) after the dielectric breakdown may not be large enough to cause failure. The magnitude of the leakage current is affected by the circuit environment of the device which includes, for example, the drive current or the capacitative loading of the circuit. The tolerance for current increases varies considerably for different circuits and some circuits are less sensitive to the erosion of noise and voltage margins than others. The lifetime projection based on this criterion tends to be very conservative, as it does not take into account the circuit environment of the device in specific applications.
Hence, as evident from the foregoing discussion, it is desirable to provide a method of reliability testing that is more accurate and relevant to the IC application.
SUMMARY OF INVENTION
The present invention relates to a method of reliability testing. In accordance with the invention, a critical breakdown resistance of a device is determined, wherein the critical breakdown resistance causes a circuit to fail. The test structure is then subjected to stress conditions. The operating resistance of the test structure is determined repetitively. A critical breakdown time is recorded when the operating resistance is equal or less than the critical breakdown resistance. The reliability of the device is determined from the critical breakdown time.
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B. Kaczer, R. DeGraeve, G. Groeseneken, M. Rasras, S. Kubicek, E. Vandamme, G. Badenes; “Impact of MOSFET Oxide Breakdown on Digital Circuit Operation and Reliabilty”; IEDM Tech Digest 2000; pp. 553-556.
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Deb Anjan K.
Infineon Technologies Aktiengesellschaft
Slater & Matsil L.L.P.
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