Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating
Reexamination Certificate
2002-02-15
2004-08-10
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
With means to control surface effects
Insulating coating
C257S758000, C257S644000, C257S650000
Reexamination Certificate
active
06774461
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor manufacturing process, and in particular to a method of reducing thick film stress of a spin-on dielectric and the resulting sandwich dielectric structure.
BACKGROUND OF THE INVENTION
Spin-on dielectric layers have been widely used to meet the planarization requirement, preventing a depth focus problem from occurring in the succeeding lithography process, and thus the accuracy of photo-patterning is improved. The planarization of spin-on dielectric layer in general requires a thick dielectric layer to be spin coated, while the stress of the dielectric layer is increased with the increment of the spin coating thickness. A spin-on dielectric layer will crack if its thickness/stress is too large, resulting in a high leaking current, and thus the dielectric layer loses the insulation characteristic. In order to avoid these drawbacks, a dielectric material was spin coated twice to obtain a thicker dielectric layer. Further, a dielectric layer having a low dielectric constant in general suffers a poor thermal stability and anti-water penetration ability, and thus there is a need to develop a technique to form a dielectric layer having enhanced properties.
U.S. Pat. No. 6,294,832 discloses a semiconductor device having a structure of copper interconnect/barrier dielectric liner/low-K dielectric trench and its fabrication method, in which a barrier dielectric liner made of a nitrogen-containing liquid-phase-deposition (LPD) fluorosilicate glass (FSG) film is used to replace a barrier metal layer and an oxide liner.
SUMMARY OF THE INVENTION
The present invention provides a technique to reduce a stress of thick spin-on dielectric layer by forming a sandwich dielectric structure, wherein a first dielectric layer is formed on a substrate by spin coating, a liquid phase deposited (LPD) fluorosilicate glass (FSG) layer is formed the first dielectric layer, and a second dielectric layer is formed on the LPD silica layer by spin coating. The LPD silica layer can be further subjected to a nitrogen plasma treatment so that the whole FSG film is nitridized to prevent movable ions from penetrating through, and enhance thermal stability and anti-water migration ability in effectiveness, and thus the reliability of the spin-on dielectric layer can be improved greatly. As a result, the spin-on dielectric layer will have a higher potential in more applications.
REFERENCES:
patent: 5567660 (1996-10-01), Chen et al.
patent: 6187663 (2001-02-01), Yu et al.
patent: 6294832 (2001-09-01), Yeh et al.
patent: 6492257 (2002-12-01), Shields et al.
patent: 6521524 (2003-02-01), Wang et al.
Hsu Chih-Chuan
Lee Yueh-Chuan
Wang Shuo-Cheng
Wu Kwo-Hau
Yeh Ching-Fa
Bacon & Thomas
National Science Council
Pham Long
Trinh (Vikki) Hoa B.
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