Method of reducing the low-frequency component of jitter in a di

Multiplex communications – Wide area network – Packet switching

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370112, 375118, H04J 306, H04L 700

Patent

active

052299988

ABSTRACT:
A digital data transmission system comprises at its input a higher order multiplexer receiving at least one stream of digitized data organized into blocks and at a specific timing, said multiplexer transmitting each block of data in a digital multiplex to the output of the transmission system via a digitized data transmission channel subject to a variable multiplexing delay. To reduce the low-frequency component of the jitter in a timing signal reconstituted at the output of the system, the multiplexing delay is measured for the current transmission of a block of data in the multiplex and the measured multiplexing delay is compared with a reference value to determine a multiplexing delay offset and if necessary to defer said current transmission. The measurement and comparison are repeated for the next transmission of a block of data in the multiplex using in the comparison the multiplexing offsets determined for previous transmissions.

REFERENCES:
patent: 4133981 (1979-01-01), Kibler
patent: 4604582 (1986-08-01), Strenkowski et al.
patent: 4775987 (1988-10-01), Miller

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