Method of reducing charging damage to integrated circuits in ion

Details Method of reducing charging damage to integrated circuits in ion Method of reducing charging damage to integrated circuits in ion

1997-10-21

1999-12-07

Niebling, John F.

Semiconductor device manufacturing: process

Semiconductor substrate dicing

438462, 438466, H01L 21301, H01L 2146, H01L 2178, H01L 21326, H01L 21479

Patent

active

059982829

ABSTRACT:
Charging damage to integrated circuits during ion implantation and plasma processing of integrated circuit die in a semiconductor wafer is reduced by processing scribe lanes during wafer fabrication to facilitate the flow of current to and from the wafer substrate through the scribe lanes during integrated circuit fabrication and reduce current flow through integrated circuit components.

REFERENCES:
patent: 5462636 (1995-10-01), Chen et al.
patent: 5521125 (1996-05-01), Ormond et al.
patent: 5696404 (1997-12-01), Murari et al.

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