Method of reducing charging damage to integrated circuits...

Details Method of reducing charging damage to integrated circuits... Method of reducing charging damage to integrated circuits...

2006-11-16

2009-06-16

Mulpuri, Savitri (Department: 2812)

Semiconductor device manufacturing: process

Making device array and selectively interconnecting

C438S462000, C438S638000, C438S710000, C438S453000

Reexamination Certificate

active

07547584

ABSTRACT:
An integrated circuit die includes thereon a first device region, a second device region and a non-active region. A first implant mask, which covers the second device region and the non-active region, while exposing the first device region, is formed over the semiconductor substrate. Dopant species are implanted into the exposed semiconductor substrate within the first device region to form first doping regions therein. A second implant mask is formed over the semiconductor substrate. The second implant mask covers the first device region, while exposing the second device region and a portion of the non-active region. Dopant species are implanted into the exposed semiconductor substrate within the second device region to form second doping regions therein.

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patent: 2008/0174022 (2008-07-01), Chen et al.
U.S. Appl. No. 10/908,815, filed May 27, 2005, Ko-Ting Chen et al.

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