Image analysis – Applications – Manufacturing or product inspection
Reexamination Certificate
1999-10-27
2003-08-19
Boudreau, Leo (Department: 2621)
Image analysis
Applications
Manufacturing or product inspection
C716S030000
Reexamination Certificate
active
06608922
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of recognizing a connection of a reconstructing pattern in a printed wiring board, and in particular to a method for recognizing a connection of a reconstructing pattern in a printed wiring board when a circuit modification process after a printed board wiring is performed by a physical cutting, a jumper, and the like.
When a circuit realized on a printed wiring board as pattern-designed by a design supporting device there for and the like is modified, a cutting of a pattern, an addition of a jumper, and a deletion or addition of electric parts are performed to make the printed wiring board correspond to a modified circuit.
Since the works for cutting the pattern and for determining an additional position of the jumper of such a printed wiring board take time and easily cause errors as the circuit becomes complicated and the pattern is highly densified, it is demanded to realize a method of recognizing a connection of a reconstructing pattern in a printed wiring board.
2. Description of the Related Art
FIGS. 27A-27C
show examples of circuit information and pattern information used in a conventional method (1) of recognizing a connection of a reconstructing pattern.
FIG. 27A
shows circuit information, first edition before modification, in which net Nos.
1
and
2
are respectively allotted to groups of lands (A, B, C) and (D, E) as connecting elements.
A design supporting device (not shown) connects lands A, B, C of the net No.
1
in the order of the land A, a line L
1
, a via V
1
, a line L
2
, the land B, a line L
3
, and the land C based on the circuit information, first edition, and performs a pattern design for connecting lands D and E of the net No.
2
in the order of the land D, a line L
4
, a via V
2
, a line L
5
, and the land E to output the connections as pattern information, first edition.
The pattern information, first edition is composed of the land (via) information (A, B, C, D, E, V
1
, V
2
), the line information (L
1
-L
5
), and net information. The net information is composed of the lands, which are the same as the lands of the circuit information, first edition for each of the net Nos.
1
and
2
, as well as the vias and the lines for connecting the lands, for each of the net Nos.
1
and
2
.
FIG. 27B
shows second circuit information and pattern information when a circuit modification that lands A and B are connected to a land X added instead of the land C in the net No.
1
. is performed to the circuit connection of FIG.
27
A.
Namely, in the circuit information, second edition, the lands of net No.
11
corresponding to the net No.
1
of the circuit information, first edition is modified to the lands A, B and X, while the lands D and E of net No.
12
corresponding to the net No.
2
have no modification.
In the pattern information, second edition, the land X is added to the land information, the line information has no modification, the land C and the line L
3
are deleted from the connecting elements of the net No.
11
in the net information and the land X is added to the same, and the connecting elements of the net No.
12
has no modification.
FIG. 27C
shows an image of files of the information shown in
FIGS. 27A and 27B
. Pattern information, first edition file F
1
is prepared from circuit information, first edition file F
1
, and circuit information, second edition file F
2
is prepared according to a circuit modification, so that pattern information, second edition file F
21
is prepared from the circuit information, second edition file F
2
.
The pattern information, first edition file F
11
is compared with the pattern information, second edition file F
21
so that a physically different part is found to perform a pattern reconstruction.
This method has to retain the pattern information corresponding to the circuit information for every circuit modification as a file so that the storage capacity required becomes large.
FIGS. 28A and 28B
show examples of the circuit information and the pattern information used in a conventional method (2) of recognizing a connection of a reconstructing pattern. In these examples, the circuit information, first edition file F
1
, the pattern information, first edition file F
11
, and the circuit information, second edition file F
2
are the same as those shown in
FIGS. 27A-27C
. However, in the pattern information after the circuit modification, the line L
2
which mutually connects the lands B and C is assumed to be not connected to the land B, as shown in FIG.
28
B.
Accordingly, although the pattern information, second edition file is not used as modified pattern information to require a smaller storage capacity, the propriety of dummy portions becomes less clear so that the required storage capacity increases as the frequency of the modification increases.
Furthermore, since it is premised in this method that the pattern information has no short circuit and a line element is required to be separated in a psudo form, the best section for separation can not be detected in a loop pattern or a large area pattern.
FIG. 29
shows a data structure example of a pattern link table (hereinafter abbreviated as PTLNK table)
10
, a land table (hereinafter abbreviated as LAND table)
20
, and a line table (hereinafter abbreviated as LINE table)
30
used by prior art methods (1) and (2) of recognizing a connection of a reconstructing pattern. In this example, the pattern information is composed of the PTLNK table
10
, the LAND table
20
, and the LINE table
30
in order to recognize the connection of connecting elements such as lands, lines, and the like.
Arrangement elements
11
,
12
, . . . etc. of the PTLNK table
10
corresponds to the net Nos.
1
,
2
, . . . etc. shown in
FIGS. 27A-27C
, wherein the arrangement elements
11
,
12
, . . . etc. are composed of land link pointers (hereinafter abbreviated as LNDLNKP pointer) and line link pointers (hereinafter abbreviated as LINLNKP pointer) which respectively point the land to be connected in the LAND table
20
and the line in the LINE table
30
.
The LAND table
20
and the LINE table
30
are respectively composed of the arrangement elements corresponding to the lands and lines which are the connecting elements of the whole circuit. The arrangement elements
21
-
27
, . . . etc. of the LAND table
20
are composed of the lands (or vias) A-E, V
1
, V
2
, . . . etc. and the land link pointers which point the arrangement elements of the lands to be connected to the above-mentioned lands (or vias) A-E, V
1
, V
2
, . . . etc. These land link pointers will be also hereinafter abbreviated by the same reference character as the LNDLNKP pointer of the PTLNK table. The LINE arrangement elements
31
-
35
, . . . etc. of the LINE table
30
are composed of the lines L
1
, . . . L
5
, etc. and the line link pointers which point the arrangement elements of the lines to be connected to the above-mentioned lines L
1
, . . . L
5
, . . . etc. These line link pointers will be also hereinafter abbreviated as LINLNKP pointer in the same manner.
For instance, the LNDLNKP pointer of the arrangement element
11
in the PTLNK table
10
points the arrangement element
21
of the LAND table
20
so that the LNDLNKP pointer of the arrangement element
21
points the arrangement element
22
. Hereafter, the arrangement elements
23
and
26
are sequentially pointed in the same manner, so that when the LNDLNKP pointer of the arrangement element
26
is set to “0”, the link of the land by the pointer is ended.
In addition, the LINLNKP pointer of the arrangement element
11
in the PTLNK table
10
points the arrangement element
31
in the LINE table
30
, the LINLNKP pointer of the arrangement element
31
points the arrangement element
32
, and the LINLNKP pointer of the arrangement element
32
points the arrangement element
33
, so that when the LINLNKP pointer of the arrangement element
33
is set to “0”, the link of the line by the pointer is ended.
Accordingly, all of the lands and lines
Boudreau Leo
Lu Tom Y.
LandOfFree
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