Method of queuing traffic to many destinations covering a...

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Reexamination Certificate

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C370S428000, C370S474000

Reexamination Certificate

active

06810042

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to queuing of traffic to many destinations covering a wide range of communication interface speeds while minimizing queuing buffer size and/or software queue processing overhead in networking systems.
BACKGROUND
As technology improves, the speed of transmission in communication systems such as networking systems is always increasing. As newer and faster communication interfaces are implemented, the need to support older and slower communication interfaces remain. This may be due to the fact that economics prevent the total upgrade of older systems to take advantage of faster communication interfaces. However, various problems exist in supporting both the older and newer interfaces as will be described further below.
Networking is generally known as a configuration of computers and software connected for information interchange through communication interfaces. It has become a gateway in which computer processing and electronic communication have merged into one entity. The goal is to process all information including data, voice and image transmission by digital techniques according to a unified standard such as integrated services digital network (ISDN). In allowing the various computers in a networking system to transmit and receive information, the pool of information accessible by a computer is far greater than that of a stand-alone computer system. Generally, a networking system may be divided into a number of links. A link may be a local area network (LAN) with each LAN capable of supporting several computers. Where the distance between computers is far apart, that network of computers may be defined as a wide area network (WAN). In a networking system supporting tens, hundreds or even thousands of computers, the maintenance of information traffic within the networking system becomes very important.
Generally, for information traffic purposes, information to be transmitted through the networking system for example, using ISDN standard, may be implemented into quantifiable packets known as “frames” or “cells” dependent on the type of communication protocol to be used in the networking system. Frames relays are generally used in narrowband ISDN, also known as first generation ISDN. An improvement over frame relays, cell relays are generally used in broadband ISDN (BISDN), also known as second generation ISDN. Cell relays are synonymous with an interface protocol known as asynchronous transfer mode (ATM). Because ATM holds an important place in networking communication, ATM will be further discussed below.
The principle behind ATM is to take any received information whether it be data, voice or image, and any speed rate of the information, segment the information up into predetermined fixed-length packets such as cells, and attach a header to the individual cells so that the cells can be sent to its destination. Simply stated, ATM has no bearing on the contents of the information or the speed of the information received. It simply segments the information into cells. A cell may comprise a 5 byte header and 48 bytes of information according to one standard. Because ATM uses small, fixed size cells, they can be switched efficiently and at very high transfer rates. Once transmitted in a networking system, the cells are forwarded from link to link until it reaches its destination.
The processing module may have multiple ports to receive multiple communication interface boards used to implement distributed transmission. One problem is the amount of buffer that needs to be allocated for each port such that the fastest communication interfaces could operate without information loss and without compromising speed while accommodating for the slower communication interfaces. Buffers, however, are generally expensive. Typically, in designing a buffer system centrally located in the processing module for accommodating all interfaces, the buffer system needs to be designed based on the maximum thoroughput. As an example, in a processing module with three ports, if the potential transfer rate ranges from 1.5 Megabits/second (Mb/s) (e.g. T1 carrier) to 155 Mb/s (e.g. OC3 carrier) for each port, the buffer size for each port should accommodate the transfer rate of 155 Mb/s. However, in the event that all three communication interface boards inserted use T1 carrier, each buffer size would be excessive leading to inefficient cost usage of the buffers. If the buffer size is compromised, in the event that all three communication interface boards inserted use OC3 carrier, the boards may operate with loss of information and/or compromise in speed. This is generally not desirable.
The processing module may also provide segmentation of information into packets and/or reassembly of packets into information. According to one method, the software that provides such capability to the processing module may also be used to provide a buffer fill management. Generally, at certain intervals, the software polls the buffers to determine if there is room to accept packets. Where the software is not synchronized to the ports of the communication interface boards, either the port capacity is not fully utilized or the queuing entity expends additional resources to check that there is room available in the buffers. This causes the software to be diverted from its main function of segmenting and reassembling information. Where a high rate of segmentation and reassembly is demanded by the processing module, such diversion causes the processing module to perform at less than maximum potential. Furthermore, in certain systems, where various communication boards are used, when one of the boards fail, this creates a bottleneck in the system in which the flow of information is blocked.
SUMMARY OF THE INVENTION
An apparatus is described that provides queuing traffic to many destinations covering a wide range of communication interface speeds while minimizing buffer size. The apparatus may comprise a plurality of communication interface boards that distribute packets which are coupled to a processing module that segments information into variable length and/or fixed length packets. Each communication interface board has an individual packet transmission speed. A buffer is provided in the communication interface boards according to the transmission speed of the board. Other features and advantages of the present invention will be apparent from the accompanying drawings and detailed description to be followed below.


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The Basics, Chapter 8, ATM, p. 141-151 (date prior to Jan. 4, 1999).

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