Method of programming semiconductor memory device having...

Details Method of programming semiconductor memory device having... Method of programming semiconductor memory device having...

2005-05-17

2005-05-17

Nguyen, Van Thu (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S185190, C365S185220

Reexamination Certificate

active

06894929

ABSTRACT:
The present invention provides a method of programming, into a computer, a memory array having a plurality of memory cells, including a verification step1of verifying whether a memory cell has been already programmed or it has not been programmed yet per memory cell to be programmed, a flagging step2of flagging the memory cell in the case where it is verified that the memory cell has not been programmed yet in the several verifying steps, to which the memory cell is subjected thereafter, even if it is verified that the memory cell has been already programmed, a first application step3of applying a programming pulse having a programming level to the not-programmed memory cell without any flag, a repeat step4of repeating the verification step1, the flagging step2and the first application step3until it is verified that all of the memory cells have been already programmed at least once, and a second application step5of applying a boost pulse having a boost programming level lower than that of the programming level to the memory cell with the flag.

REFERENCES:
patent: 5920508 (1999-07-01), Miyakawa et al.
patent: 6028794 (2000-02-01), Nakai et al.
patent: 6292394 (2001-09-01), Cohen et al.
patent: 6646927 (2003-11-01), Keays
patent: 05-304277 (1993-11-01), None

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