Method of programming, reading and erasing memory-diode in a...

Static information storage and retrieval – Interconnection arrangements – Transistors or diodes

Reexamination Certificate

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C365S105000, C365S115000, C365S175000

Reexamination Certificate

active

07379317

ABSTRACT:
A memory array includes first and second sets of conductors and a plurality of memory-diodes, each connecting in a forward direction a conductor of the first set with a conductor of the second set. An electrical potential is applied across a selected memory-diode, from higher to lower potential in the forward direction, intended to program the selected memory-diode. During this intended programming, each other memory-diode in the array has provided thereacross in the forward direction thereof an electrical potential lower than its threshold voltage. The threshold voltage of each memory-diode can be established by applying an electrical potential across that memory-diode from higher to lower potential in the reverse direction. By so establishing a sufficient threshold voltage, and by selecting appropriate electrical potentials applied to conductors of the array, problems related to current leakage and disturb are avoided.

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patent: 2006/0002168 (2006-01-01), Krieger et al.

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