Method of programming of a non-volatile memory cell...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185280, C365S189070

Reexamination Certificate

active

11141255

ABSTRACT:
A method and arrangement are provided for programming an electrically erasable programmable read-only memory cell capable of storing at least one information bit. The memory cell has a charge-trapping region. According to the invention, during a first period of time, a fixed voltage is applied to the memory cell to inject and store electrical charge in the charge-trapping region. This period of time is followed by second period of time during which a constant current is applied to the memory cell to complete the programming step. By monitoring a change in voltage during the second period of time, a monitoring of a resulting threshold voltage is possible directly during programming.

REFERENCES:
patent: 5712815 (1998-01-01), Bill et al.
patent: 6097639 (2000-08-01), Choi et al.
patent: 6396742 (2002-05-01), Korsh et al.
patent: 6487116 (2002-11-01), Khan et al.
patent: 198 60 506 (1999-07-01), None

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