Method of programming cell in memory and memory apparatus...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S203000, C365S185180

Reexamination Certificate

active

07916551

ABSTRACT:
A method of programming a first cell in a memory, wherein the first cell has a first S/D region and shares a second S/D region with a second cell that has a third S/D region opposite to the second S/D region. The channels of the first and the second cells are turned on, a first voltage is applied to the first S/D region, a second voltage is applied to the second S/D region and a third voltage is applied to the third S/D region. The second voltage is between the first voltage and the third voltage, and the first to third voltages make carriers flow from the third S/D region to the first S/D region and cause hot carriers in the channel of the first cell to be injected into the charge storage layer of the first cell.

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patent: 200713289 (2007-04-01), None

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