Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2011-01-11
2011-01-11
Dinh, Son (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S218000, C365S189011
Reexamination Certificate
active
07869282
ABSTRACT:
A method of processing an array of non-volatile memory cells to program or erase the same, by applying a voltage to the same through a program and verify pulse application circuit. The process includes a first step of selecting a voltage to be applied. Then, the maximum number of memory cells that can be processed simultaneously is determined, based on the selected voltage and characteristics of the memory cells and the circuit. The array is divided into processing groups, each group having a number of cells less than or equal to the maximum determined number. Finally, the voltage is applied to the cells.
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Chu Chi-Ling
Hung Chun-Hsiung
Lo Su-Chueh
Dinh Son
Haynes Beffel & Wolfeld LLP
Macronix International Co. Ltd.
Nguyen Nam
Suzue Kenta
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