Method of programming a nonvolatile flash-EEPROM memory array us

Static information storage and retrieval – Floating gate – Disturbance control

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Details

36518513, 36518526, 36518533, G11C 1602

Patent

active

056338228

ABSTRACT:
A method for writing cells in a memory which reduces errors caused by depleted memory array cells being turned on even when not selected. In the method, nonselected bit lines and nonselected word lines are biased so that the threshold voltage of the nonselected cells increases. In particular, the nonselected bit lines are left floating and the nonselected word lines are set to a zero voltage. Appropriate potentials are applied to the selected word line, selected bit line, and selected source line in order to program the selected cell.

REFERENCES:
patent: 4888734 (1989-12-01), Lee et al.
patent: 4949309 (1990-08-01), Rao
patent: 4972371 (1990-11-01), Komori et al.
patent: 5241507 (1993-08-01), Fong

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