Method of production of a patterned semiconductor layer

Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Including integrally formed optical element

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S031000, C438S044000

Reexamination Certificate

active

06864112

ABSTRACT:
The present invention relates to a method for the production of semiconductor components. This method comprises the steps of applying masking layers and components on epitaxial semiconductor substrates within the epitaxy reactor without removal of the substrate from the reactor. The masking layers may be HF soluble such that a gas etchant may be introduced within the reactor so as to etch a select number and portion of masking layers. This method may be used for production of lateral integrated components on a substrate wherein the components may be of the same or different type. Such types include electronic and optoelectronic components. Numerous masking layers may be applied, each defining particular windows intended to receive each of the various components. In the reactor, the masks may be selectively removed, then the components grown in the newly exposed windows.

REFERENCES:
patent: 4415404 (1983-11-01), Riegl
patent: 4614564 (1986-09-01), Sheldon et al.
patent: 4816098 (1989-03-01), Davis et al.
patent: 4980312 (1990-12-01), Harris et al.
patent: 5268069 (1993-12-01), Chapple-Sokol et al.
patent: 5418183 (1995-05-01), Joyner et al.
patent: 5668038 (1997-09-01), Huang et al.
patent: 5702569 (1997-12-01), Park et al.
patent: 5937273 (1999-08-01), Fujii et al.
patent: 6140247 (2000-10-01), Muraoka et al.
patent: 0681315 (1995-11-01), None
patent: 0746011 (1996-12-01), None
patent: 5006880 (1993-01-01), None
patent: 5160085 (1993-06-01), None
patent: 6224153 (1994-05-01), None
patent: 07202317 (1995-08-01), None
patent: 01270287 (1998-10-01), None
Patent Abstracts of Japan, Pub. No. 07202317A (English), pp. 1.
Machine language translation of Japanese Application Pub. No. 07202317A (English), pp. 7.
Japan Patent Office Examination for Pub. No. 07202317A (German), 8 pages.
Japanese Patent Abstract; Pub. No. 02046407; Pub. Date Feb. 15, 1990; to Yamazaki Koji.
Japanese Patent Abstract; Pub. No. 61-210687 A; Pub. Date Sep. 18, 1986; to Katsuko Shima.
Takayuki Aoyama et al.; Silicon Surface Cleaning Using Photoexcited Fluorine Gas Diluted with Hydrogen; J. Electrochem. Soc., vol. 140, No. 6, Jun. 1993, pp. 1704-1708.
G.P. Burns; Low-temperature native oxide removal from silicon using nitrogen trifluoride prior to low-temperature silicon epitaxy; Appl. Phys. Lett. 53(15), Oct. 10, 1988, pp. 1423-1425.
Yoshida et al.; Selective-area epitaxy of GaAs using a new mask material for in situ processes; Inst. Phys. Conf. Ser. No. 129, Ch. 3, 1992, pp. 49.
Ikegami et al.; Gallium Arsenide and Related Components 1992; Phys. Conf. Ser. No. 129, Ch. 3, 1992, pp. 50-54.
Ozasa et al.; Deposition of thin indium oxide film and its application to selective epitaxy for in situ processing; Thin Solid Films, 246 (1994), pp. 58-64.
Harbison et al.; Tungsten patterning as technique for selective area III-V MBE growth; J. Vac. Sci. Technol. B3 (2) Mar./Apr. 1985, pp 743-745.
O'Sullivan et al.; Selective-area epitaxy for GaAs-on-InP opoelectronic integrated circuits; Semiconductor Science and Technology, Jun.8, 1993, No. 6, Briston, GB, pp. 1179-1185.
Henle et al.; In situ Selective area etching and MOVPE regrowth of GaInAs-InP substrates; IEEE Catalog #92CH3104-7; Library of Congress #91-77922, Apr. 21, 1992.
Hikaru Sugano, Semiconductor Laser Manufacturing Method Oct. 27, 1989, pp. 1-6.*
Whidden T.K. et al.; “Catalyzed HF Vapor Etching Of Silicon Dioxide Für Micro-and Nanolithographic Masks”; April 1995; J. Electrochem Soc., vol. 142, No. 4, pp. 1199-1204.
Torek K. et al.; “Reduced Pressure Etching of Thermal Oxides in Anhydrous HF/Alcoholic Gas Mixtures”; Apr. 1995; J. Electrochem Soc., vol. 142, No. 4, pp. 1322-1326.
Wong M. et al., “Characterization of Wafer Cleaning and Oxide and Oxide Etching Using Vapor-Phase Hydrogen Fluoride”;Jun. 1991, J. Electrochem, Soc., vol. 138, No. 6, pp. 1799-1802.
AMMT GmbH (Advanced Micromashing Tools GmbH), “HF vapor etcher”, ™1997-2004, http://www.ammt.de/.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of production of a patterned semiconductor layer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of production of a patterned semiconductor layer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of production of a patterned semiconductor layer will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3392495

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.