Fishing – trapping – and vermin destroying
Patent
1994-04-06
1995-03-07
Thomas, Tom
Fishing, trapping, and vermin destroying
437 41, 437203, H01L 21336
Patent
active
053957776
ABSTRACT:
A method of producing reduced-size VDMOS transistors having reduced leakage and a reduced propensity to latch-up. These advantages are attained by reducing the vertical projective area of the source electrodes of the VDMOS transistors. This is done by forming first trenches which are sufficiently deep to reach an epitaxial layer on a substrate of the VDMOS transistors before second trenches are formed.
REFERENCES:
patent: 4503598 (1985-03-01), Vora et al.
patent: 4625388 (1986-02-01), Rice
patent: 4682405 (1987-07-01), Blanchard et al.
patent: 4748103 (1931-05-01), Hollinger
patent: 4860084 (1989-08-01), Shibata
patent: 4960723 (1990-10-01), Davies
patent: 5089434 (1992-02-01), Hollinger
Thomas Tom
United Microelectronics Corp.
LandOfFree
Method of producing VDMOS transistors does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of producing VDMOS transistors, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of producing VDMOS transistors will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1405692