Method of producing thin film transistor array

Metal working – Method of mechanical manufacture – Assembling or joining

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29572, 29578, 29591, 357 4, H01L 2104, H01L 2112

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active

043320759

ABSTRACT:
A method of producing thin film transistor arrays and having at least 7 steps including: a first step of forming a first electrode layer uniformly over an insulating substrate; a second step of forming electrodes, such as drain and source electrodes and bus bars with a desired pattern by photoetching the first electrode; a third step of forming a uniform semiconducting layer on the surface of the substrate having the patterned electrodes; a fourth step of successively forming a uniform insulating layer over the uniformly deposited semiconducting layer while keeping the array in a vacuum; a fifth step of photoetching the uniformly deposited insulating layer into a desired pattern; a sixth step of photoetching the uniform semiconducting layer into the same pattern as the patterned insulating layer; a seventh step of forming a second electrode uniformly over the surface having the patterned electrodes and insulating layer; and an eighth step of photoetching the uniformly deposited second electrode into a desired pattern.

REFERENCES:
patent: 3258663 (1966-06-01), Weimer
patent: 3423821 (1969-01-01), Nishimura
patent: 3436620 (1969-04-01), Diemer et al.
patent: 3460005 (1969-08-01), Kanda et al.
patent: 3649369 (1972-03-01), Hunsperger et al.
patent: 3766637 (1973-10-01), Norris
patent: 4213807 (1980-07-01), Rosnowski

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