Method of producing strained-layer semiconductor devices via sub

Details Method of producing strained-layer semiconductor devices via sub Method of producing strained-layer semiconductor devices via sub

1991-02-08

1993-07-06

Wilczewski, Mary

Fishing, trapping, and vermin destroying

437133, 437174, 437247, 437 40, H01L 21322, H01L 21324

Patent

active

052253686

ABSTRACT:
A method is described for patterning subsurface features in a semiconductor device, wherein the semiconductor device includes an internal strained layer. The method comprises creating a pattern of semiconductor material over the semiconductor device, the semiconductor material having a predetermined thickness which stabilizes areas of the strained semiconductor layer that lie beneath the pattern. Subsequently, a heating step is applied to the semiconductor device to cause a relaxation in areas of the strained layer which do not lie beneath the semiconductor material pattern, whereby dislocations result in the relaxed areas and impair electrical transport therethrough.

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