Method of producing shallow, narrow base bipolar transistor stru

Details Method of producing shallow, narrow base bipolar transistor stru Method of producing shallow, narrow base bipolar transistor stru

1982-03-08

1984-02-14

Roy, Upendra

Metal treatment

Compositions

Heat treating

29576B, 148187, 357 34, 357 59, 357 91, H01L 21425, H01L 21265, H01L 2174

Patent

active

044314604

ABSTRACT:
A method for fabricating high performance NPN bipolar transistors which result in shallow, narrow base devices is described. The method includes depositing a polycrystalline silicon layer over a monocrystalline silicon surface in which the base and emitter regions of the transistor are to be formed. Boron ions are ion implanted into the polycrystalline silicon layer near the interface of the polycrystalline silicon layer with the monocrystalline silicon layer. An annealing of the layer structure partially drives in the boron into the monocrystalline silicon substrate. Arsenic ions are ion implanted into the polycrystalline silicon layer. A second annealing step is utilized to fully drive in the boron to form the base region and simultaneously therewith drive in the arsenic to form the emitter region of the transistor. This process involving a two-step annealing process for the boron implanting ions is necessary to create a base with sufficient width and doping to avoid punch-through. There is also described a method for forming NPN transistors in an integrated circuit.

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