Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Compound semiconductor
Reexamination Certificate
2000-03-03
2002-05-28
Pham, Long (Department: 2823)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Compound semiconductor
C438S022000, C438S745000
Reexamination Certificate
active
06395572
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a method of producing semiconductor green light-emitting elements comprising a semiconductive GaP compound. In particular, this invention relates to a method of producing such semiconductor light-emitting elements including a surface-roughening process by a wet etching method using hydrochloric acid so as to improve the external differential quantum efficiency while preventing the electrodes from being affected by the processing liquid and maintaining good characteristics regarding ohmic contact and wire bonding on the electrode.
FIG. 2
shows a prior art semiconductor light-emitting element having an n-type GaP layer
22
and a p-type GaP layer
23
epitaxially grown on a substrate
21
of n-type GaP and having a light-emitting part formed as a pn junction therebetween. A top electrode (“p-layer electrode”)
26
comprising an Au-Be alloy layer
26
a
, a Ti layer
26
b
and an Au layer
26
c
is formed over a portion of the top surface and a bottom electrode (“n-layer electrode”)
27
is formed as an Au-Be alloy layer on the bottom surface. Each such element is obtained as a chip from a wafer. The reason for forming the top electrode
26
over only a portion of the top surface is that the electrode screens off light while it is desirable to design the element such that as much light as possible can be received therefrom. Thus, the top electrode
26
is made to occupy as small an area as possible within a limit that the electric current therethrough can spread across the entire sectional area of the chip. The reason for using a three-layer structure as the top electrode
26
is that the Au-Be alloy layer
26
a
is required to improve the ohmic contact with the GaP layer, the Ti layer
26
b
in the middle is required to serve as a barrier layer for preventing diffusion of Ga because its deposition on the surface of the electrode would have an adverse effect on the adhesive force of wire bonding and the Au layer
26
c
is required for an improved contact with a gold wire which is attached to the electrode by wire bonding.
After it is formed as a chip, the exposed surfaces of the semiconductor layer is subjected to a roughening process by using hydrochloric acid, for example, to produce protrusions and indentations so as to improve the external differential quantum efficiency by which light is taken outside. It has been known in particular to carry out such a surface treatment by a wet etching process with hydrochloric acid for improving the external differential quantum efficiency.
Thus, according to the prior art technology for the production of a semiconductor light-emitting element by growing GaP layers on a GaP substrate and roughing the exposed surfaces of the semiconductor layer after it is made into the form of a chip, the wet etching process for roughening the exposed surfaces is carried out after the electrodes are formed on the top of the semiconductor layered part and the bottom of the substrate. This is firstly because the roughening process be done only after the dicing process for producing a chip, secondly because the electrodes can be formed more efficiently on a wafer, and also because if the electrodes are formed after a roughening process is effected over all surfaces of a wafer, the electrodes become hard to recognize at the time of wire bonding and this affects the wire bonding characteristics adversely and/or the resistance across the contact surfaces becomes large.
If roughening process by wet etching is carried out after the formation of the electrodes, on the other hand, the electrodes which have been formed are also dipped in the etching liquid. If hydrochloric acid is used for the roughening process for the production of the element described, above, for example, the Ti layer
26
b
which is the middle layer of the electrode of the three-layer structure is invaded by it. In order to prevent this undesired effect, the Ti layer
26
b
must be made extremely thin so as not to become etched away. If it is made too thin, however, it cannot act sufficiently effectively as a barrier layer, adversely affecting the resultant wire bonding characteristic.
The reason for roughening the exposed surfaces of the semiconductor layers is to prevent the light generated at the light-emitting layer from undergoing total reflections inside the chip and to become absorbed internally and to thereby make it easier to escape outside. The reflectivity at the surfaces changes, depending on the depth of the unevenness, and the external differential quantum efficiency is greatly influenced thereby. Thus, if a liquid which will not etch the materials of the electrode is used for the roughening process, a desired level of unevenness cannot be obtained on the exposed surfaces of the semiconductor layers and hence the external differential quantum efficiency cannot be sufficiently improved.
SUMMARY OF THE INVENTION
It is therefore an object of this invention to provide a method of producing semiconductor light-emitting elements by which electrodes with a good ohmic contact and improved wire bonding characteristics can be formed by preventing the diffusion of Ga onto the electrode surface while carrying out a roughening process to produce sufficient unevenness with protrusions and indentations around the light-emitting element chip.
A method embodying this invention, with which the above and other objects can be accomplished, may be characterized as comprising the steps of providing a wafer substrate comprising GaP, epitaxially growing thereon a semiconductor layered structure including an ntype layer and a p-type layer comprising GaP for providing a light-emitting layer, forming top electrodes on the semiconductor layered structure each over a portion of an area corresponding to one of the chips into which the substrate is to be later divided, forming a bottom electrode on the bottom surface of the substrate, dicing the wafer substrate into the individual chips, and thereafter carrying out a surface-roughening process on externally exposed portions of the semiconductor layered structure by means of hydrochloric acid. Each of the top electrodes is of a three-layer structure with a contact metal layer which makes an ohmic contact with the GaP of the semiconductor layered structure, a Mo layer on the contact metal layer and an Au layer on the Mo layer. In the above, the surface-roughening process is carried out such that a surface-roughness of about 0.1-3 &mgr;m will result in terms of the height difference between the resulting protrusions and indentations. The contact metal layer may be made of one or more alloys of Au with Be, Zn and Ni such that none of the materials for the top electrode is affected by the hydrochloric acid which is used in the wet etching process for the surface roughening.
REFERENCES:
patent: 4914499 (1990-04-01), Homoto
patent: 5488253 (1996-01-01), Matsuoka
Ogura Kotaro
Tsutsui Tsuyoshi
Beyer Weaver & Thomas LLP
Pham Long
ROHM Co, Ltd.
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