Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Mesa formation
Reexamination Certificate
2000-05-18
2003-12-02
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Mesa formation
C257S095000, C372S045013
Reexamination Certificate
active
06656759
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of producing a semiconductor element. More particularly, the invention concerns a method of producing a semiconductor element having such structure that an electrode is formed on an upper surface of a microscopic projection, such as ridge type semiconductor lasers, vertical cavity surface emitting lasers, or the like, used for optical communication, optical information processing, and so on. The invention also concerns a gyroscope produced using the method.
2. Related Background Art
In recent years, research has been conducted actively on surface emitting lasers from the aspect of capability of attaining low power consumption and high-density integration in the fields of optical communication and optical information processing. The typical size of such elements in in-plane directions is several &mgr;m to several ten &mgr;m in diameter, and the depth thereof is about several &mgr;m. A conventional production process of such semiconductor elements will be described below with reference to Japanese Patent Application Laid-Open No. 8-250817, as illustrated in
FIGS. 20A
to
20
C.
As illustrated in
FIG. 20A
, a lower multilayer reflector (distributed Bragg reflector (DBR))
403
, a lower spacer layer
405
, an active layer
404
, an upper spacer layer
406
, and an upper multilayer reflector
402
are grown on a substrate
407
by epitaxy such as metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or the like. Further, a silicon dioxide (SiO
2
) film
409
is formed on the upper multilayer reflector
402
by chemical vapor deposition (CVD).
Then, as illustrated in
FIG. 20B
, a circular resist pattern is formed on the SiO
2
film
409
by a known technique, such as photolithography, electron beam lithography, or the like, and reactive ion etching (RIE) is carried out using this resist pattern as an etching mask, thereby transferring the resist pattern to the SiO
2
film.
After that, the resist is removed with an oxygen plasma, and reactive ion beam etching (RIBE) is carried out using the SiO
2
film as an etching mask to etch the layers down to the substrate
407
, thereby forming a cylindrical structure. Then, after wet etching is carried out to eliminate strain induced damage due to the RIBE, the substrate with the cylindrical structure is immersed in ammonium sulfide solution in which diphosphorus pentasulfide (P
2
S
5
) is dissolved, to form a passivation film on the side surface. Then a semiconductor thin film (not shown) is selectively grown on the side wall by MOCVD or the like.
Then, as illustrated in
FIG. 20C
, this cylindrical structure is embedded in polyimide
408
and the polyimide layer is etched with the oxygen plasma so as to expose the top part of the cylindrical structure. Then the SiO
2
film
409
is removed and an electrode
410
is formed by photolithography. In the last place, the back surface is polished and a back electrode (not shown) is formed thereon except for a light output portion.
The above-stated conventional technology, however, uses the photolithography process for forming the electrode
410
on the top part of the cylinder structure and thus necessitates alignment between the top part of the cylinder and the electrode. The size of these elements in the in-plane directions is extremely small, several &mgr;m or less in diameter, as stated previously, and thus the conventional technology required highly accurate alignment in order to form the electrode on only the upper surface of the projection.
Particularly, for integration of a plurality of elements on a flat basis, the alignment must be made with extremely high accuracy, which posed problems of decrease of yield, increase of production cost, and so on.
Meanwhile, it was common practice heretofore to form a passivation film in order to prevent oxidation of the side surface of the semiconductor elements. The passivation film on the upper surface of the electrode was removed for electric connection to the semiconductor element.
In the cases where the semiconductor elements were processed in a ridge shape or in a mesa shape, the photolithography was normally employed in order to remove the passivation film on the upper surface of the electrode.
However, the conventional photolithography methods required alignment between a photomask and the ridge or mesa shape. As the width of the ridge or mesa shape has been becoming narrower and narrower to below the micrometer order, relative positional deviation has become unignorable, which posed a problem that it was difficult to selectively remove the passivation film on the upper surface of the electrode.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method of producing a semiconductor element, by which an electrode can be formed readily on an upper surface of a microscopic projection.
Another object of the present invention is to provide a method of producing a semiconductor element, by which a passivation film can be formed readily on a side surface of a semiconductor element member having a projection region on a substrate.
Still another object of the present invention is to provide semiconductor elements produced by the above methods.
A method of producing a semiconductor element according to the present invention is a method comprising:
a step of preparing a semiconductor element member comprising a projection region on a substrate;
a step of embedding an upper surface of the substrate, and upper and side surfaces of the projection region in a potting material;
an exposure step of exposing the upper surface of the projection region;
a deposition step of depositing an electrode material on the upper surface of the projection region; and
a step of removing the potting material.
Another method of producing a semiconductor element according to the present invention is a method comprising:
a step of preparing a semiconductor element member comprising a projection region on a substrate;
a step of forming a first passivation film on an upper surface of the substrate, and upper and side surfaces of the projection region;
a step of forming a second passivation film on the first passivation film;
an exposure step of removing the second passivation film on the upper surface of the projection region to expose the first passivation film;
a step of removing the first passivation film on the upper surface of the projection region; and
a step of removing the second passivation film remaining on the upper surface of the substrate.
Still another method of producing a semiconductor element according to the present invention is a method comprising:
a step of preparing a semiconductor element member comprising a projection region on a substrate;
a step of forming a passivation film on an upper surface of the substrate, and upper and side surfaces of the projection region;
a step of embedding the upper surface of the substrate, and the upper and side surfaces of the projection region in a potting material;
an exposure step of exposing the passivation film on the upper surface of the projection region;
a step of removing the passivation film on the upper surface of the projection region;
a deposition step of depositing an electrode material on the upper surface of the projection region; and
a step of removing the potting material.
REFERENCES:
patent: 5426658 (1995-06-01), Kaneno et al.
patent: 5559053 (1996-09-01), Choquette et al.
patent: 5640410 (1997-06-01), Yang
patent: 5895224 (1999-04-01), Park et al.
patent: 4-174317 (1992-06-01), None
patent: 8-250817 (1996-09-01), None
Nakanishi Koichiro
Numai Takahiro
LandOfFree
Method of producing semiconductor element, semiconductor... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of producing semiconductor element, semiconductor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of producing semiconductor element, semiconductor... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3167676