Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2007-05-08
2007-05-08
Jackson, Jerome (Department: 2815)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S400000, C438S430000, C438S431000, C438S435000, C438S437000, C438S787000, C257SE21546
Reexamination Certificate
active
10607216
ABSTRACT:
A method of producing semiconductor devices is provided, which makes it possible to bury a silicon oxide without shape deterioration in device isolation trenches. The method comprises the steps of: forming an etching resistive mask over a semiconductor substrate; etching the semiconductor substrate through an opening in the etching resistive mask to form a device isolation trench; forming a coat of a silazane perhydride polymer solution over the semiconductor substrate having the device isolation trench formed therein; vaporizing a solvent from the coat and then subjecting the coat to chemical reaction to form a film of silicon oxide; removing said film of the silicon oxide leaving a residue inside said device isolation trench; and heating said silicon oxide left in said device isolation trench for densification.
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Decision of Rejection issued by the Japanese Patent Office mailed Feb. 28, 2006, for Japanese Application No. 2002-056799, and English-language translation thereof.
Notification of Reasons for Rejection issued by the Japanese Patent Office mailed Nov. 16, 2004, for Japanese Application No. 2002-056799, and English-language translation thereof.
Kawasaki Atsuko
Matsuda Satoshi
Matsumori Hisakazu
Okuwada Kumi
Shibata Hidenori
Diaz José R.
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Jackson Jerome
Kabushiki Kaisha Toshiba
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