Method of producing redundant ROM cells

Details Method of producing redundant ROM cells Method of producing redundant ROM cells

1982-09-23

1983-12-13

Ozaki, G.

Metal working

Method of mechanical manufacture

Assembling or joining

29577C, 29578, 148187, H01L 21225, H01L 21265

Patent

active

044198086

ABSTRACT:
The present invention comprises a unique FET with resistor in its drain lead of undoped polysilicon which may be characterized by high resistance in the absence of the application of a biasing voltage across the FET and the resistor when the FET is conducting, which biasing voltage irreversibly changes the resistor to a high state of conductivity thereby selectively providing the two logic states. This device may comprise a redundant cell for a ROM memory and may be uniquely fabricated utilizing VLSI MOS processing steps to provide a new manufacturing process.

REFERENCES:
patent: 4041518 (1977-08-01), Shimizu et al.
patent: 4072545 (1978-02-01), De La Moneda
patent: 4178674 (1979-12-01), Liu et al.
patent: 4187602 (1980-02-01), McElroy
patent: 4214917 (1980-07-01), Clark et al.
patent: 4231051 (1980-10-01), Custode et al.
patent: 4265685 (1981-05-01), Seki
patent: 4297721 (1981-10-01), McKenny et al.
Ning, IBM Technical Disclosure Bulletin, vol. 23, No. 1, Jun., 1980.

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