Method of producing microaddresses and a computer system for ach

Details Method of producing microaddresses and a computer system for ach Method of producing microaddresses and a computer system for ach

1980-07-16

1983-07-05

Zache, Raulfe B.

Boots, shoes, and leggings

307465, G06F 932

Patent

active

043921981

ABSTRACT:
A central processing unit of a computer system comprises a programmable logic array which is constructed of an AND matrix and an OR matrix. The AND matrix is responsive to a machine language instruction and to a number of a region for selecting one row from a plurality of rows arranged in the AND matrix. The OR matrix, which also has a plurality of rows, is responsive to the selected row for selecting one row therefrom. In each of the rows of the OR matrix a microaddress and a number of a region to be used for producing a subsequent microaddress are prewritten so that information on a microaddress and information on a region number are respectively obtained. At least one microinstruction included in a microprogram will be read out from a read-only memory in accordance with the obtained microaddress to execute the same, while a microaddress of a subsequent microprogram is produced in the programmable logic array. Namely the execution of a microprogram routine and the production of the first address of a following microprogram routine are concurrently performed so that efficient execution of microprograms can be achieved, while each microinstruction is not required to include region number information.

REFERENCES:
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patent: 4034356 (1977-07-01), Howley
patent: 4037089 (1977-07-01), Horninger
patent: 4237542 (1980-12-01), Cukier
McKinney et al., "PLA With Provision for Interrupts", IBM Tech. Disc. Bulletin, vol. 20, No. 2, 7/1977, pp. 745-746.
Hicks, "Sequence Controller Using PLA", IBM Tech. Disc. Bulletin, vol. 20, No. 2, 7/1977, pp. 743-744.

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