Etching a substrate: processes – Forming or treating electrical conductor article – Forming or treating of groove or through hole
Reexamination Certificate
1995-06-27
2003-04-15
Alanko, Anita (Department: 1746)
Etching a substrate: processes
Forming or treating electrical conductor article
Forming or treating of groove or through hole
C216S038000, C216S039000, C216S049000, C216S053000, C216S085000, C216S088000, C216S090000, C216S092000, C216S100000, C216S105000
Reexamination Certificate
active
06547974
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to producing circuit boards and, more particularly, to manufacturing fine-line printed circuit boards.
2. Description of the Related Art
Circuit boards provide a substantially planar surface on which electronic components can be mounted. Circuit paths for the components are provided by forming conductive lines on the circuit board that connect component-mounting through-holes in the board. Electrical leads that extend from the components are electrically connected to the conductive lines when the components are mounted to the board through-holes. Circuit boards can be single-sided, in which case components are mounted only on one surface of the circuit board, or circuit boards can be double-sided, in which case components can be mounted to both surfaces of the board. Generally, a single-sided board comprises a non-conductive substrate, such as a glass fiber-resin combination, with conductive lines formed on the board surface opposite the component mounting surface, and a double-sided board comprises a central conductive layer clad on top and bottom surfaces with non-conductive separation layers, with conductive lines formed on one or both board surfaces.
Printed circuit boards are generally manufactured using either a subtractive etch process, an acid plate pattern plating process, or an electroless pattern plating process. The electroless plating process is also referred to as additive pattern plating. In all of these processes, a circuit mask that lays out the desired pattern of the conductive lines is transferred to the circuit board by printing the circuit mask pattern onto a polymeric radiation-sensitive resist material deposited on the board. The resist material is irradiated in the pattern of the circuit mask so that it is physically transformed where it is irradiated and is unchanged where shielded by the circuit mask. The resist material thereafter can be developed by exposing it to a fast-reacting chemical solution that selectively removes either the irradiated material (called a positive-tone resist) or removes the non-irradiated material (negative-tone resist).
The subtractive etch process typically begins with a board substrate comprised of a non-conductive material on which a layer of conductive material such as copper is plated. A layer of resist material is then deposited and developed in the circuit mask pattern so as to expose the conductive material where circuit paths are not desired. The exposed conductive material in the resist voids is then etched away. Finally, the remaining resist material is removed, leaving behind conductive lines wherever circuit paths were desired. The subtractive etch process provides good control over circuit path height because the amount of conductive material plated onto the substrate generally can be controlled rather well. Precisely controlled circuit path height is especially important with surface mount techniques. Unfortunately, the subtractive etch process does not provide precise control over circuit path width, due to plating variation and lack of sharply defined path edges. The lack of width control is disadvantageous with current demands for increasingly high component mounting densities that require relatively thin conductive lines placed in close proximity to each other.
The acid plate pattern plating process uses electro-plating techniques to deposit conductive lines in circuit paths defined by resist material voids. That is, a conductive foil layer on the circuit board is connected to an electrode and the conductive material is deposited onto the board in the resist material voids using an oppositely charged electrode. The width of the conductive lines is generally dependant on the developed resist pattern, which typically is of photographic sharpness. Pattern plating thereby provides good control over circuit path width and permits conductive lines of relatively fine width. The circuit path height, however, can vary greatly depending on the density of the desired conductive lines. In particular, isolated conductive lines are thicker than densely packed conductive lines. Thus, line height is not precisely controlled by the acid plate process. The additive plate process is similar to the acid plate process, except that chemical plating techniques are used rather than electro-plating techniques. Additive plate fabrication generally requires more time to complete as compared to acid plate fabrication but is not as susceptible to circuit path height variation according to line density. Height variations for additive plate fabrication, however, experiences height variation from side to side differences as well as copper module formation.
Currently, the surfaces of pattern plated circuit boards are not planarized. Planarization methods such as surface machining would remove non-planar regions of the printed circuit board. Chemical mechanical polish, referred to as CMP, used in the semiconductor and ceramic industries, contains abrasive slurry materials which attack both resist and copper surfaces. Such polishing techniques are not compatible with many organic based substrates, which are often used in conjunction with surface-mount technology circuit boards. Surface-mount technology is gaining in popularity because it permits higher component densities and faster component mounting as compared with more conventional wire mount techniques.
The polishing techniques are generally incompatible with organic based substrates because such substrates are somewhat flexible and typically have surface undulations. The surface undulations are due to inherent variation in substrate thickness and also are due to the inherent flexibility of the boards, which permits bowing and warping. Conventional chemical-mechanical polishing techniques will not follow these undulations and contours of flexible substrates. As a result, board areas of extra thickness or that bow outward will be left with conductive lines having areas that are too thin, and board areas of reduced thickness or that dip into a valley will be left with conductive lines having areas that are too thick.
From the discussion above, it should be apparent that there is a need for a method of manufacturing fine-line printed circuit boards that efficiently produce circuit boards with fine lines that conform to board undulations. The present invention satisfies this need.
SUMMARY OF THE INVENTION
In accordance with the invention, a printed circuit board is produced from an initial substrate board coated with a resist layer. The resist layer is patterned according to a circuit mask that defines desired circuit paths. The patterned resist layer is then selectively removed from the board in the desired circuit paths and a conductive material is deposited on the board in the areas where resist was removed, as defined by the circuit mask. The conductive material is deposited so that the height of the conductive material relative to the substrate board equals or exceeds the height of the resist layer relative to the substrate board. In a first etching step, a low-reactive solution is applied over the conductive material and slowly dissolves it by first forming a film layer. Mechanical contact is then used to remove this film layer on any surface above the resist layer. The removal of the thin film layer allows a new conductive material surface layer to be exposed to the solution and a new film layer to be formed. This process continues until the height of the resist layer is reached. At this point, when contact with the conductive material cannot be made without contacting the resist layer, a final film layer is formed. This final film layer then becomes a barrier to the low reactive solution and, in fact, on any area that is below the resist layer such as a plated through hole. In this way, no abrasive materials used in ensuring that the height of the conductive line will be substantially uniform and will conform to substrate undulations and surface irregularities. Matching the conductive material
Albrechta Stanley Michael
Boyko Christina Marie
Covert Kathleen Lorraine
Feilchenfeld Natalie Barbara
Markovich Voya Rista
Alanko Anita
Meador Terrance A.
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