Method of producing conductive pillars in semiconductor device

Details Method of producing conductive pillars in semiconductor device Method of producing conductive pillars in semiconductor device

1993-12-10

1994-10-25

Thomas, Tom

Fishing, trapping, and vermin destroying

437 41, 437229, H01L 21441

Patent

active

053589025

ABSTRACT:
Electrical connection is provided to a device region (3,4) bounded by an insulating region (12a,12b,9) and adjacent one major surface (1a) of a semiconductor body (1) by applying a flowable organic material to form an organic layer (20) on the one major surface (1a), defining a masking layer (30) over the organic layer (20), etching the organic layer (20) selectively with respect to the underlying device and insulating regions through a window (31) in the masking layer (30) to form an opening (21) exposing a contact area (11) of the device region (3,4) and depositing electrically conductive material, for example tungsten, to form a conductive pillar (40) within the opening (21) in contact with the contact area (11). The organic layer (20) is then removed so as to expose the conductive pillar (40), a layer 50 of insulating material is provided over the pillar, the insulating layer is etched to expose a top surface of the pillar and electrically conductive material deposited to contact the pillar (40).

REFERENCES:
patent: 4434544 (1984-03-01), Dohya et al.
patent: 4541168 (1985-09-01), Galie et al.
patent: 4702792 (1987-10-01), Chou et al.
patent: 4822749 (1989-04-01), Flanner et al.
patent: 4866008 (1989-09-01), Brighton et al.
patent: 4868137 (1989-09-01), Kubota
patent: 4916084 (1990-04-01), Shibata et al.
patent: 5063169 (1991-11-01), De Bruin et al.
D. Day et al., "Origin and Prevention of High Contact Resistance in Multilevel Metal-Polyimide Structures", J. of Electronic Materials, vol. 11, No. 3, 1982, pp. 441-452.
S. Wolf, Silicon Processing for the VLSI Era, vol. 2, Lattice Press, Sunset Beach, Calif., 1990, pp. 214-217.
Wolf et al., Silicon Processing for the VSLI Era, Lattice Press, Sunset Beach, 1986 pp. 564-565.
Research Disclosure-275054-A, "Dual-dielectric Fabrication Method Using Polyimide Planarize Process" Mar. 10, 1987.

Affiliated with

Also associated with

Rating

Method of producing conductive pillars in semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of producing conductive pillars in semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of producing conductive pillars in semiconductor device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-135185