Method of producing a two-dimensional electron gas semiconductor

Fishing – trapping – and vermin destroying

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437 45, 437203, 437184, 437107, 437133, 437 49, 437 50, 437234, 148DIG131, 148DIG168, H01L 21203, H01L 21302

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048493686

ABSTRACT:
Disclosed is a method of producing a compound semiconductor device comprising an enhancement-mode transistor and a depletion-mode transistor, each of which has a heterojunction and utilizes a two-dimensional electron gas. The method of producing the device comprises the steps of: forming an undoped GaAs channel layer on a semi-insulating GaAs substrate; forming an N-type AlGaAs electron-supply layer so as to form the heterojunction; forming an N-type GaAs layer; forming an AlGaAs layer; selectively etching the AlGaAs layer to form a recess; performing an etching treatment using an etchant which can etch rapidly GaAs and etch slowly AlGaAs to form simultaneously grooves for gate electrodes of the enhancement-mode transistor and the depletion-mode transistor, the bottoms of the grooves being in the N-type AlGaAs layer and the distance between the bottoms being equal to the thickness of the AlGaAs layer; and forming simultaneously the gate electrodes in the grooves.

REFERENCES:
patent: 4163237 (1979-07-01), Dingle et al.
patent: 4325073 (1982-04-01), Hughes et al.
patent: 4325181 (1982-04-01), Yoder
patent: 4601096 (1986-07-01), Calviello
patent: 4635343 (1987-01-01), Kuroda
patent: 4732870 (1988-03-01), Timura
patent: 4742379 (1988-05-01), Yamashita et al.
patent: 4746627 (1988-05-01), Zuleeg
Hiyamizu et al., "MBE Grown GaAs-N-AlGaAs Heterostructures and their Appln. to High Electron Mobility Transistors", Jap. Journal of Appl. Phys., vol. 21 (1982), Supp. 21-1, pp. 161-168.
Hikosaka et al., "Selective Dry Etching of AlGaAs-GaAs Heterojunction", Jap. Journal Appl. Phys., vol. 20, No. 11, Nov. 1981, pp. L847-L850.
Mimura et al., JEE Journal of Electronic Engineering, vol. 18, No. 179, Nov. 1981, pp. 28,29, "High Electron Mobility Transistor Logic".
Hikosaka et al., Extended Abstracts of the Journal of the Electrochemical Society, vol. 82-1, May 1982, pp. 264,265, "Selective Dry Etching of GaAs/Al GaAs Heterostructure".
Chaplart et al., Journal of the Electrochemical Society, vol. 131, No. 8, Aug. 1984, p. 309 c, No. 359, "Control of the Gate Recess in GaAsFET's . . . ".

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