Semiconductor device manufacturing: process – Making passive device – Resistor
Reexamination Certificate
2002-03-20
2003-11-11
Quach, T. N. (Department: 2814)
Semiconductor device manufacturing: process
Making passive device
Resistor
C438S618000, C438S620000, C438S622000
Reexamination Certificate
active
06645821
ABSTRACT:
FIELD OF THE INVENTION
The invention is generally related to the field of integrated circuits and more specifically to thin film resistors and methods for manufacturing the same.
BACKGROUND OF THE INVENTION
Thin film resistors are utilized in electronic circuits in many important technological applications. The resistors may be part of an individual device, or may be part of a complex hybrid circuit or integrated circuit. Some specific examples of thin film resistors in integrated circuits are the resistive ladder network in an analog-to-digital converter, and current limiting and load resistors in emitter follower amplifiers.
Film resistors can comprise a variety of materials including tantalum nitride (TaN), silicon chromium (SiCr), and nickel chromium (NiCr). These resistor materials are generally evaporated or sputtered onto a substrate wafer at a metal interconnect level and subsequently patterned and etched. The thin film resistors require an electrical connection to be made to them and generally the performance of the resistors is related to the condition and cleanliness of the resistor surface and the integrity of the electrical connection. It is well known that contaminants incorporated in the resistor material and around the electrical interconnects can have adverse effects on the resistor performance. It is important to ensure that during the manufacturing process, the resistor surface is not exposed to materials and chemicals likely to leave behind contaminants on the resistor surface that will adversely affect either the bulk sheet resistivity or the subsequent interconnect areas.
A well known method of ensuring that the resistor does not come into contact with potential contaminants during processing is to deposit a sacrificial barrier layer, such as titanium-tungsten (TiW) or other suitable material over the resistor just after it has been deposited. This barrier layer is often referred to as a “hard mask ”. After the barrier layer and resistor material are patterned and etched, the metal for the metal interconnect is deposited, patterned and etched. The “hard mask” protects the resistor during this processing and is eventually removed by a wet chemical process such as exposure to a hydrogen peroxide (H
2
O
2
) solution just before an insulation layer or passivation layer is deposited over the resistor to permanently protect it.
Maghsoudnia et al (U.S. Pat. No. 5,420,063, issued May 30, 1995) describes the use of the hard mask scheme described above in an embodiment that was designed to allow small line widths to be obtained in the integrated circuit. During processing, the thin film resistor and hard mask are protected by a photoresist layer whilst dry etching is undertaken on the rest of the integrated circuit. Subsequently, when wet etching of the resistor is undertaken, the area previously dry etched is protected by a second photoresist layer.
Linn et al (U.S. Pat. No. 5,547,896, issued Aug. 20, 1996) also describes a method of forming a thin film resistor using a hard mask. Wet etchants are utilized that selectively etch either the hard mask material or the thin film resistor material.
Morris (U.S. Pat. No. 5,485,138, issued Jan. 16, 1996) describes a method of forming an inverted thin film resistor. The resistor structure is deposited directly on top of the metallic interconnects, thus avoiding the need for a protective hard mask.
SUMMARY OF THE INVENTION
Pursuant to the present invention, a thin film resistor is disclosed which is contained between two metal interconnect layers of an integrated circuit. Contact is made to the resistor from vias on the metal layer above the resistor to both the thin film resistor and the underlying metal layer simultaneously. The advantage on this design is that flexibility in processing the resistor is increased since processes, material, and chemicals do not have to satisfy the conditions of both the resistor and the rest of the integrated circuit (especially the interconnect layer) simultaneously.
This and other advantages will be apparent to those of ordinary skill in the art having reference to the specification in conjunction with the drawings.
REFERENCES:
patent: 5296726 (1994-03-01), MacElwee
patent: 5344785 (1994-09-01), Jerome et al.
patent: 5420063 (1995-05-01), Maghsoudnia et al.
patent: 5547896 (1996-08-01), Linn et al.
patent: 5625215 (1997-04-01), Chen et al.
patent: 5874770 (1999-02-01), Sala et al.
patent: 6117789 (2000-09-01), Lee
patent: 6150228 (2000-11-01), Horiba
patent: 6326256 (2001-12-01), Bailey et al.
Bailey Fred D.
Jacobsen Stuart M.
Brady III W. James
Garner Jacqueline J.
Quach T. N.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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