Electrolysis: processes – compositions used therein – and methods – Electrolytic coating – Coating selected area
Patent
1992-03-04
1995-02-28
Niebling, John
Electrolysis: processes, compositions used therein, and methods
Electrolytic coating
Coating selected area
205126, C25D 502
Patent
active
053934067
ABSTRACT:
A thin film multilayer wiring board-producing method of the present invention is intended to decrease thermal stresses developing during the formation of the multilayer construction, and also to greatly reduce the number of the steps of the process, as compared with a conventional method. A film material can be used as an insulating film of the multilayer wiring board, and is adhesively bonded to a predetermined portion. Wiring conductors are formed by electroplating. The wiring layers are repeated laminated to form the multilayer construction. A metallic film serving as an electrode is formed on one of upper and lower surfaces of a substrate, the metallic film being removed after a multilayer wiring is formed. A soluble insulating film is formed on a metallic undercoat film on the substrate, and grooves are formed in the soluble insulating film, and wiring conductors are formed in the grooves, using either electroplating or both electroplating and electroless plating. Thereafter, the soluble insulating film and the metallic undercoat film are removed. Subsequently, an insoluble insulating film is formed at those locations from which the soluble insulating film and the metallic undercoat have been removed.
REFERENCES:
patent: 4920639 (1990-05-01), Yee
Rao R. Tummala, Microelectronics Packaging Handbook, Van Nostrand Reinhold, pp. 710-714, 1989.
Arima Hideo
Inoue Takashi
Kitamura Naoya
Yokono Hitoshi
Hitachi , Ltd.
Leader William T.
Niebling John
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