Fishing – trapping – and vermin destroying
Patent
1995-05-15
1996-05-07
Wilczewski, Mary
Fishing, trapping, and vermin destroying
437919, H01L 2170, H01L 2700
Patent
active
055146155
ABSTRACT:
A method of producing a memory cell on a semiconductor substrate. The memory cell includes two transfer transistors, two driver transistors, two thin film transistor loads, and two memory capacitors. A field insulator layer is formed on the semiconductor substrate. A gate insulator layer is formed above the field insulator layer. A gate electrode of a driver transistor is produced by forming a first conductor layer above the gate insulator layer. Impurity regions are formed in the semiconductor substrate using the field insulator layer and the first conductor layer as masks. A first insulator layer is then formed. Source, drain and channel regions of a thin film transistor load are produced by forming a second conductor layer and injecting impurities into the second conductor layer. A second insulator layer is formed above the second conductor layer. A contact hole is formed to extend from the second insulator layer, through the second conductor layer, and to the first conductor layer. A storage electrode of a memory capacitor is produced by forming a third conductor layer which makes contact with the first conductor layer and the second conductor layer through the contact hole. A dielectric layer covering the storage electrode of the memory capacitor and a fourth conductor layer forming an opposing electrode of the memory capacitor are then successively produced.
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Ema Taiji
Itabashi Kazuo
Fujitsu Limited
Tsai H. Jey
Wilczewski Mary
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