Fishing – trapping – and vermin destroying
Patent
1995-05-15
1996-04-09
Thomas, Tom
Fishing, trapping, and vermin destroying
437 50, 437195, H01L 218238
Patent
active
055061621
ABSTRACT:
A semiconductor integrated circuit device provides; a master chip including a basic cell region having a plurality of basic cell arrays arranged thereon, for forming various kinds of circuits. An input/output cell region provides a plurality of input/output cells arranged along the periphery of the basic cell region. A first wiring layer is formed on the basic cell region and the input/output cell region via a first insulation layer and has contact holes at predetermined positions. The first wiring layer includes fixed wirings irrespective of the kind of circuit to be formed. A second wiring layer is formed on the first wiring layer via a second insulation layer having through holes at predetermined positions. The second wiring layer includes programmed wirings to specify the kind of circuit to be formed. Only the wiring pattern of the second wiring layer is suitably changed in accordance with the kind of circuits to be formed and connected among the input/output cell region, basic cell regions in regions corresponding to the input/output cell regions and the basic cell region, thereby greatly reducing a turnaround time of the device.
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Hirose Yoshio
Kawahara Shigeki
Kumagai Ataru
Sasaki Takeshi
Sato Shinji
Fujitsu Limited
Thomas Tom
LandOfFree
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