Fishing – trapping – and vermin destroying
Patent
1995-02-08
1996-07-09
Fourson, George
Fishing, trapping, and vermin destroying
437 56, H01L 21265, H01L 2170, H01L 2700
Patent
active
055344542
ABSTRACT:
A power DMOS semiconductor device is producible with standard processes and provides improved current detecting accuracy. The device involves main wells (41), subwells (42), and a line well (43), which is independent of the main wells and subwells. These wells are formed by doping the surface of a semiconductor substrate (1) with well forming impurities. The line well surrounds the subwells with a predetermined distance away from the subwells, to relax an electric field on the surface of the substrate. Gate electrodes (71, 72) are patterned to form a line opening (10), which surrounds the subwells. The line opening serves as a mask when forming the line well by doping the surface of the substrate with the well forming impurities. Accordingly, the width of a region between the line well and an adjacent subwell will not fluctuate.
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Leipold et al., Experimental Study Of A High Blocking Voltage Power MOSFET With Integrated Input Amplifier, IEEE, 1983, pp. 428-431.
Kuroyanagi Akira
Nishizawa Toshiaki
Tsuzuki Yasuaki
Dutton Brian K.
Fourson George
Nippondenso Co. Ltd.
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