Fishing – trapping – and vermin destroying
Patent
1992-08-24
1995-04-25
Kunemund, Robert
Fishing, trapping, and vermin destroying
437 59, 437193, H01L 21265, H01L 2970
Patent
active
054098432
ABSTRACT:
A method of producing a semiconductor device comprising a bipolar transistor and a MOSFET (e.g., a Bi-MOS device), comprising the steps of: forming an insulating layer on an epitaxial silicon layer on a semiconductor substrate; forming a gate electrode; forming a base region; forming a PSG (an impurity containing glass) layer on the whole surface; carrying out a heat-treatment on the PSG to cause a softening and flow thereof (sloping ends of and flattening the PSG layer); opening collector, emitter, source and drain contact windows in the PSG layer and the insulating layer; forming a doped polysilicon layer over the contact windows with the formation of an emitter region; opening a base contact window; and forming metal (Al) electrodes.
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Wakui Yoji
Yamauchi Tunenori
Fujitsu Ltd.
Kunemund Robert
Pham Long
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