Method of producing a monolithic semiconductor device

Details Method of producing a monolithic semiconductor device Method of producing a monolithic semiconductor device

1975-08-01

1977-03-29

Rutledge, L. Dewayne

Metal treatment

Compositions

Heat treating

148187, H01L 21265

Patent

active

040147142

ABSTRACT:
A combination insulating means comprised of a pn-junction overlaid with a SiO.sub.2 filling within a groove is provided between IC elements in a monolithic semiconductor device. Such combination insulating means electrically and mechanically isolate at least two areas of a n-conductive surface zone, each of which supports an IC element. The n-conductive surface zone is supported on a p-conductive silicon base and the free surface of the n-conductive surface zone is coated with a Si.sub.3 N.sub.4 layer, which during the various fabrication steps of the monolithic semiconductor device protects coated areas of the n-conductive surface zone from etchants, oxidation and from dopants.

REFERENCES:
patent: 3725150 (1973-04-01), George
patent: 3755001 (1973-08-01), Kooi et al.
patent: 3783047 (1974-01-01), Paffen et al.
patent: 3808058 (1974-04-01), Henning

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