Fishing – trapping – and vermin destroying
Patent
1993-08-30
1995-04-04
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437162, 437191, 257588, H01L 21265
Patent
active
054037573
ABSTRACT:
A double-layered structure of the base electrode corresponding to the emitter diffused-region 15 to be formed, which consists of the first and second conducting films 5, 6. This structure effects to prevent the surface of the silicon substrate in the emitter diffused-region to be formed from being etched away by the overetching for forming the base electrode, with much reduction of leakage current due to the consequent damage to the silicon-substrate surface in the emitter diffused-region to be formed, leading to improvement in transistor yield.
REFERENCES:
patent: 4648937 (1987-03-01), Ogura et al.
patent: 4671970 (1987-06-01), Keiser et al.
patent: 4731341 (1988-03-01), Kawakatsu
patent: 4753709 (1988-06-01), Welch et al.
patent: 4975381 (1990-12-01), Taka et al.
patent: 5010039 (1991-04-01), Ku et al.
patent: 5026654 (1991-06-01), Tanba et al.
patent: 5037768 (1991-08-01), Cosentino
patent: 5109262 (1992-04-01), Kadota et al.
patent: 5192992 (1993-03-01), Kim et al.
patent: 5198372 (1993-03-01), Verret
patent: 5232861 (1993-08-01), Miwa
patent: 5279976 (1994-01-01), Hayden et al.
patent: 5354699 (1994-10-01), Ikeda et al.
Chaudhuri Olik
NEC Corporation
Pham Long
LandOfFree
Method of producing a double-polysilicon bipolar transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of producing a double-polysilicon bipolar transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of producing a double-polysilicon bipolar transistor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2380278