Fishing – trapping – and vermin destroying
Patent
1991-09-04
1993-08-24
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 11, 437939, 148DIG12, 148DIG135, H01L 21302
Patent
active
052388751
ABSTRACT:
This invention provides a bonded wafer of the n
.sup.+ or p/p.sup.+ step junction or the SOI configuration possessing an outstanding getter effect by bonding two wafers thereby forming a n
.sup.+ or p/p.sup.+ stage junction or a SOI configuration and, prior to the bonding, incorporating in one of the wafer surfaces an oxidation-induced stacking fault capable of producing a gettering effect. When a semiconductor device is produced by forming necessary components on the second semiconductor wafer surface side of the bonded wafer of this invention, therefore, the leak current across the pn junction of the semiconductor device is decreased, the life time of the carrier is improved, and the yield of the semiconductor device is notably enhanced without reference to the discrimination between the MOS type and the bipolar type.
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Silicon Processing for the VLSI Era; vol. 1, Wolf et al pp. 44-47, 61-66; 1986.
Gettering Utilizing Implant Damage and Highly Disordered Epitaxial Layer; Poponiak et al; pp. 2052-2053; IBM Tech. Dis. Bulletin; vol. 19 No. 6; Nov. 1976.
Oxidation Induced Stacking Faults in N- and P-Type (100) Silicon; Murarka et al; Jour. of App. Phys.; vol. 48; No. 1; Jan. 1987; pp. 46-51.
Hearn Brian E.
Shin-Etsu Handotai & Co., Ltd.
Trinh Michael
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