Method of processing the signalling information within configura

Multiplex communications – Wide area network – Packet switching

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370 681, H04J 312

Patent

active

051650924

ABSTRACT:
In configurable intelligent primary multiplexers the individual 64 kbits/s channels of several incoming and outgoing PCM-links are to be re-arranged with the aid of a commercially available integrated circuit in such a manner that the desired channel configuration is achieved. The signalling information belonging to the individual channels is transmitted for all intelligence channels of a link in the time slots No. 16 of the superframe, each time slot containing the signalling information of two channels. In order to be able to perform the re-arrangement of the signalling information in parallel to that of the intelligence channels without the continuous help of a processor the signalling bit stream lined-up by an ancillary device is converted in such manner that the signalling information of the individual 64 kbit/s channels is in identically numbered time slots as they are allocated to the corresponding intelligence channels. For this reason the signalling information belonging to the intelligence channels 16-30 is stored in a shift register (SR1) at the input side and read out at the time slots corresponding to said intelligence channels. At the output side the last-named signalling information is stored in an analogous manner in a shift register (SR2) in order to be interleaved during the next frame with the signalling information of the intelligence channels 1-15.

REFERENCES:
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patent: 4486878 (1984-12-01), Havermans
patent: 4546469 (1985-10-01), Favrel et al.
patent: 4726017 (1988-02-01), Krum et al.
patent: 4787081 (1988-11-01), Waters et al.
patent: 4839888 (1989-06-01), Baltz et al.
patent: 4967411 (1990-10-01), Grover

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