Method of processing substrate for a beveled semiconductor devic

Details Method of processing substrate for a beveled semiconductor devic Method of processing substrate for a beveled semiconductor devic

1990-04-23

1991-09-03

Hearn, Brian E.

Fishing, trapping, and vermin destroying

137225, 137 6, 148 332, 148DIG161, 51325, H01L 21461

Patent

active

050455052

ABSTRACT:
When both main surface sides of a substrate doped with an impurity at a lower concentraiton are subjected to diffusion to form a higher concentrated impurity layer on the surfaces, about a half of the thickness of the substrate is removed to expose a layer doped with the impurity at the lower concentration on one surface of the substrate. Then the exposed lower concentrated impurity layer is polished to provide the substrate for semiconductor device comprising double layers composed of higher and lower concentrated impurities. Beveled portions are formed to have such a peripheral contour of the substrate as a beveled depth of the surface to be removed substantially half the thickness of the substrate is made larger than that of the surface not to be removed of the substrate, and an angle between an inclining surface and a main surface of the beveled portion on the removed surface is made larger than that of the beveled portion of the non-removed surface, before the diffusion to both the surfaces is carried out or after the same has been carried out.

REFERENCES:
patent: 3015590 (1962-01-01), Fuller
patent: 3742593 (1973-07-01), Smith
patent: 4630093 (1986-12-01), Yamaguchi et al.
IEEE Transactions on Electron Devices ED-31 (1984) Jun., No. 6, pp. 733-738, "The Influence of Surface Charge and Bevel Angle on the Blocking Behavior of a High-Voltage p.sup.+ --n--n.sup.+ Device".
"Reduction of Grinding and Lapping Defects", Mendel et al., IBM Technical Disclosure Bulletin, vol. 25, No. 9, Feb. 1983, p. 4761.

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