Semiconductor device manufacturing: process – Gettering of substrate
Reexamination Certificate
1999-09-23
2001-04-10
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
Gettering of substrate
C438S690000, C438S692000, C438S745000, C438S753000
Reexamination Certificate
active
06214704
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to a method of processing semiconductor wafers, and, more particularly, to a method of processing semiconductor wafers for producing relatively flat wafers having back surface damage for external gettering.
Semiconductor wafers are generally prepared from a single crystal ingot, such as a silicon ingot, which is trimmed and ground to have one or more flats for proper orientation of the wafer in subsequent procedures. The ingot is then sliced into individual wafers which are each subjected to a number of processing operations to reduce the thickness of the wafer, remove damage caused by the slicing operation, and to create a highly reflective surface. Typically, the peripheral edge of each wafer is rounded to reduce the risk of wafer damage during further processing. A lapping operation (an abrasive slurry process) is then performed on the front and back surfaces of the wafer to reduce the thickness of the wafer and remove damage induced by the slicing operation. A chemical etching operation or a rough grinding operation may also be performed to reduce the thickness and remove damage.
Upon completion of the lapping operation, one or both surfaces of each wafer are usually polished using a polishing pad, a colloidal silica slurry (polishing slurry) and a chemical etchant to remove damage to the surfaces induced by prior operations and to ensure that the wafer is planar. Thereafter, it is often desirable to induce damage on the back surface of each wafer to provide external gettering sites. Conventionally, the back surface of each wafer is subjected to an abrasive process, such as pressure jetting, or a polysilicon deposition process to induce damage on the back surface for external gettering sites. The front surface of the wafer must be protected while the damage is induced on the back surface. The wafers are then cleaned and the front surface may be finish polished. Finally, the wafers are inspected prior to delivery to the customer for dicing the wafer into semiconductor chips.
The finished wafers must meet certain surface flatness requirements. Such wafers must be polished particularly flat in order to print circuits on them (or on layers deposited upon them) by, for example, an electron beam-lithographic or photolithographic process. Wafer flatness in the focal point of the electron beam delineator or optical printer is important for uniform imaging in the electron beam-lithographic and photolithographic processes. The flatness of the wafer surface directly impacts device line width capability, process latitude, yield and throughput. The continuing reduction in device geometry and increasingly stringent device fabrication specifications are forcing manufacturers of semiconductor wafers to prepare flatter wafers. To achieve flatter wafers, double surface polishing has become the process of choice.
However, flatness is negatively impacted by conventional methods for creating back side damage to facilitate gettering. The conventional method of processing a semiconductor wafer requires a process after double surface polishing in order to induce damage to provide gettering sites on the back surface of the wafer. After this gettering process, an additional polishing process on the front surface of the wafer is required to remove the processed damage. This additional process can severely degrade the wafer flatness. The additional step is costly in that processing and handling are increased, and it requires that special precautions be taken to protect the front surface from damage.
SUMMARY OF THE INVENTION
Among the several objects of this invention may be noted the provision of a method for processing a semiconductor wafer sliced from a single-crystal ingot that reduces the processing required for shaping each wafer; the provision of such a process which produces a relatively flat wafer; the provision of such a process which produces a wafer having gettering sites; and the provision of such a process which is economical for use in processing wafers.
Generally, a method of the present invention for processing a semiconductor wafer sliced from a single-crystal ingot and having front and back surfaces and a peripheral edge comprises lapping the front and back surfaces of the wafer to reduce the thickness of the wafer and to improve the flatness of the wafer. The lapping step creates damage on the front and back surfaces. The method further comprises fine grinding the front surface of the wafer to reduce the damage on the front surface caused by the lapping and to further reduce the thickness of the wafer. During the fine grinding step, the damage on the back surface is left intact. The front and back surfaces of the wafer are simultaneously polished using a polishing slurry to improve the flatness of the wafer and to reduce wafer damage on the front and back surfaces. The wafer damage remaining on the back surface after polishing is greater than the wafer damage on the front surface. The wafer damage remaining on the back surface facilitates gettering.
In another aspect of the invention, a method of processing the semiconductor wafer comprises lapping the front and back surfaces of the wafer to reduce the thickness of the wafer and to improve the flatness of the wafer. The lapping step creates damage on the front and back surfaces. The method further comprises simultaneously polishing the front and back surfaces of the wafer such that less wafer material is removed from the back surface than the front surface. The wafer damage remaining on the back surface is greater than the wafer damage on the front surface. The wafer damage remaining on the back surface facilitates gettering.
Other objects and advantages of the invention will be apparent from the following detailed description.
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Elms Richard
Lebentritt Michael S.
MEMC Electronic Materials , Inc.
Senniger Powers Leavitt & Roedel
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