Multiplex communications – Channel assignment techniques – Carrier sense multiple access
Reexamination Certificate
1999-08-05
2003-06-17
Ton, Dang (Department: 2661)
Multiplex communications
Channel assignment techniques
Carrier sense multiple access
C370S447000
Reexamination Certificate
active
06580724
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This non-provisional application claims priority under 35 U.S.C. §119(a) to Japanese Patent Application No. Hei-10-221684, filed Aug. 5, 1998, the entirety of which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a method of preventing data destruction in a multiplex communication system. The invention acts to prevent surviving transmission data from being destroyed whose transmission was stopped due to the delay in collision detection in a network communication based on CSMA/CD (Carrier Sense Multiple Access with Collision Detect).
2. Background Art
In network communication based on CSMA/CD, two or more communication apparatuses connected to the network simultaneously start sending transmission data, these communication apparatus keep sending the transmission data while the same transmission data is flowing over the network, then, when they start indicating a mismatch in the transmission data, those communication apparatus which are prioritized over others in the transmission data survive, and the communication apparatus having the highest priority ultimately survives to continue sending the transmission data.
In the above-mentioned communication scheme, if the other communication apparatus are not outputting transmission data over the network, the communication apparatus in question is always ready for outputting transmission data. Therefore, a communication apparatus A that started transmission from a transmission terminal Tx
1
at time t
1
can start transmission upon a determination that no other communication apparatus started transmission because of a hardware time delay between transmitter and receiver until time t
3
, at which transmission data a of the communication apparatus A is inputted to the reception terminals RX
1
and RX
2
of each communication apparatus. Consequently, another communication apparatus B may start sending transmission data b from its transmission terminal Tx
2
at time t
2
which lies between time t
1
and time t
3
.
If such a situation occurs, received data c at the reception terminals RX
1
and RX
2
of each communication apparatus becomes longer in H (High) level width than the transmission data by &Dgr;t
1
as shown in
FIGS. 14 and 15
. As a result, the communication apparatus A and B each determine that each has received the transmission data different from that sent by each, accordingly, both communication apparatus stop sending the transmission data.
In order to resolve such a problem, the method disclosed in Japanese Patent Laid-open No. Hei 5-211511 controls the pulse width such that, as shown in
FIG. 15
, the falling of the transmission data a and b transmitted from the transmission terminals Tx
1
and Tx
2
takes place at point of time which has passed by &Dgr;&agr; from time t
3
at which the reception terminals RX
1
and RX
2
of the communication apparatus receive the transmission data a previously transmitted, &Dgr;&agr; a being obtained by subtracting time &Dgr;t
1
indicating a delay in reception of transmission data from time T corresponding to the bit information of digital data.
The above-mentioned conventional device is effective for so-called pulse width digital modulating (PWM scheme) in which, if the bit information of digital data is 0, the pulse width (namely, a H level time) is ⅔ of 1-bit time and, if the bit information is 1, the pulse width is ⅓ of the 1-bit time. However, in this PWM scheme, the bit information is PWM-controlled, thereby complicating the control of sending and receiving transmission data. On the other hand, in the bit serial scheme, in which, if the bit information of digital data is 0, the pulse width is 0, namely 1-bit time L (Low) level, and, if bit information 1, the pulse width is 1-bit time H (High) level, the pulse width of 1-bit information is not varied, thereby simplifying the control of sending and receiving transmission data. However, the technology disclosed in the above-mentioned patent laid-open corrects the data shift caused by a time lag between transmitter and receiver by varying the pulse width, so that this technique is not applicable to a bit serial scheme.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a method of preventing data destruction in a multiplex communication system effectively in a bit serial scheme, which can prevent the destruction caused by collision of transmission data due to the time lag in the transmission data between the transmitter and the receiver.
In carrying out the invention and according to one aspect thereof, there is provided a method of preventing data destruction in a multiplex communication system in which a clock is provided for time-dividing the 1-bit data to perform bit serial communication control for establishing bit data depending on a state of a plurality of items of data in a central portion obtained by the time division. This method may be effected by carrying out the steps of starting, by the transmitter, after transmitting transmission data, a transmission clock when the transmission data has been received by the receiver; resetting, by the receiver, a reception clock when the received data has become nonpriority data; comparing the transmission data established by the transmission clock with the received data in a bit serial manner; and, stopping the transmission whenever a mismatch is found.
According to this novel configuration, the clocks of the transmitter and the receiver can be synchronized with each other. If there is a time delay of less than 1-bit time between the transmitter and the receiver, and two or more communication apparatuses start transmission during that time delay, data destruction due to data collision can be prevented.
In carrying out the present invention and according to another aspect thereof, a communication format to be transmitted by the transmitter has a non-prioritized bit signal after a unit address for determining transmission priority. According to this novel configuration, the number of communication apparatuses connected to the multiplex communication system can be increased.
Further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.
REFERENCES:
patent: 5402420 (1995-03-01), Kobayashi
patent: 5495469 (1996-02-01), Halter
patent: 5579299 (1996-11-01), Halter
patent: 5699250 (1997-12-01), Kobayashi
patent: 5790603 (1998-08-01), Maeda
patent: 6374161 (2002-04-01), Iwai
patent: A 5211511 (1993-08-01), None
Ogawa Sumitaka
Ouchi Katsuhiro
Birch & Stewart Kolasch & Birch, LLP
Honda Giken Kogyo Kabushiki Kaisha
Pizarro Ricardo M.
Ton Dang
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