Method of power reduction in pla's

Details Method of power reduction in pla's Method of power reduction in pla's

1995-04-11

1998-01-27

Trans, Vincent N.

Boots, shoes, and leggings

364488, 326 39, H03K 19177, G06F 1750

Patent

active

057127905

ABSTRACT:
A reduced power programmable logic array is disclosed. The circuit includes an AND array, coupled through product term lines to an output OR array. Pull-up devices in the OR array are gated to one of the active product term lines. Also disclosed is method for choosing a product term line for gating pull-up devices such that power consumption in the pull-up devices is minimized.

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