Method of performing access to a single-port memory device,...

Details Method of performing access to a single-port memory device,... Method of performing access to a single-port memory device,...

2006-06-06

2006-06-06

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Addressing

Sync/clocking

C365S189011

Reexamination Certificate

active

07057965

ABSTRACT:
An arbiter15for accessing a single-port RAM13without the need to use a hand-shaking protocol is proposed. This allows simultaneous read and write accesses to a single-port RAM13. All write accesses are delayed so that the arbiter15can detect if there is a simultaneous read access. If there is a read access, the read access is delayed until the write access is completed.

REFERENCES:
patent: 5659687 (1997-08-01), Kim et al.
patent: 6370037 (2002-04-01), Schoenfish
patent: 2004/0228199 (2004-11-01), Oda

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