Method of parallel lapping a semiconductor die

Details Method of parallel lapping a semiconductor die Method of parallel lapping a semiconductor die

2004-09-23

2008-08-12

Lebentritt, Michael S. (Department: 2812)

Semiconductor device manufacturing: process

Repair or restoration

C438S455000, C438S459000, C438S977000, C257SE21001

Reexamination Certificate

active

07410813

ABSTRACT:
In a lapping process for lapping away layers from a semiconductor device, where the region of interest is located near an edge or corner of the device, the method includes adding additional semiconductor material adjacent the region of interest.

REFERENCES:
patent: 5655948 (1997-08-01), Yapel et al.
patent: 5664987 (1997-09-01), Renteln
patent: 5972798 (1999-10-01), Jang et al.
patent: 6110806 (2000-08-01), Pogge
patent: 6248001 (2001-06-01), Carson et al.
patent: 6461941 (2002-10-01), Kim
patent: 6661102 (2003-12-01), Newman et al.
patent: 6683379 (2004-01-01), Haji et al.
patent: WO 96/39275 (1996-12-01), None

Affiliated with

Also associated with

Rating

Method of parallel lapping a semiconductor die does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of parallel lapping a semiconductor die, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of parallel lapping a semiconductor die will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4012352