Method of operating a semiconductor device and the...

Details Method of operating a semiconductor device and the... Method of operating a semiconductor device and the...

2007-04-10

2007-04-10

Nguyen, Tuan T. (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S230060, C365S194000, C365S189090

Reexamination Certificate

active

11005023

ABSTRACT:
A speed circuit path includes inverter chains that are controllable to operate in a slower, low sub-threshold leakage current mode or a faster, higher sub-threshold leakage current mode depending on an operating mode of the semiconductor device. A non-speed circuit path includes inverter chains that operate to reduce sub-threshold leakage current regardless of an operating mode of the semiconductor device.

REFERENCES:
patent: 5446700 (1995-08-01), Iwase
patent: 6100563 (2000-08-01), Arimoto
patent: 6232793 (2001-05-01), Arimoto et al.
patent: 6327211 (2001-12-01), Kai et al.

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