Method of operating a nonvolatile semiconductor memory device

Static information storage and retrieval – Floating gate – Particular biasing

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365218, 365184, G11C 1602

Patent

active

054522480

ABSTRACT:
In this invention, charges are extracted from the charge storage portion by means of F-N tunnel current, and then avalanche hot carriers are injected into the storage portion.

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E. Takeda et al., Device Performance Degradation Due To Hot-Carrier Injection At Energies Below the Si-SiO.sub.2 Energy Barrier, 1983 International Electron Devices Meeting, Article No. 15.5, pp. 396-399, Dec. 1983.
S. Yamada et al., A Self-Convergence Erasing Scheme For A Simple Stacked Gate Flash EEPROM, 1991 International Electron Devices Meeting, Article No. 11.4.1, pp. 307-310, Dec. 1991.
K. Naruke et al., Restraint Of Variation In Threshold Voltage To 1/3, Prevention of Excessive Erasion In Flash Type EEPROM, Nikkei Microdevices, pp. 85-91, Feb. 1992 (English Translation Attached).

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