Method of operating a first-in first-out (FIFO) circuit

Details Method of operating a first-in first-out (FIFO) circuit Method of operating a first-in first-out (FIFO) circuit

2006-12-26

2006-12-26

Wambach, Margaret R. (Department: 2816)

Electrical pulse counters, pulse dividers, or shift registers: c

Applications

Control

C377S026000, C377S028000, C365S221000

Reexamination Certificate

active

07154983

ABSTRACT:
The present invention provides an overflow detector for a FIFO. The FIFO includes a plurality of registers each having an input and an output, a plurality of write signals each respectively coupled to a clock, one of the plurality of registers, and a plurality of read switches each respectively coupled to an output of one of the plurality of registers, each of the plurality of read switches being controlled by a respective read signal. The overflow detector includes a plurality of clocked registers each of which is coupled to receive a write signal and its corresponding read signal, wherein each clocked register records a read signal and is clocked by the corresponding write signal.

REFERENCES:
patent: 4873667 (1989-10-01), Geadah et al.
patent: 6101329 (2000-08-01), Graef

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